REGISTER  |  SIGN IN
United States Patent7138629
Noji , ; et al.November 21, 2006
Title
Testing apparatus using charged particles and device manufacturing method using the testing apparatus
Abstract
A system for further enhancing speed, i.e. improving throughput in a SEM-type inspection apparatus is provided. An inspection apparatus for inspecting a surface of a substrate produces a crossover from electrons emitted from an electron beam source 25.cndot.1, then forms an image under a desired magnification in the direction of a sample W to produce a crossover. When the crossover is passed, electrons as noises are removed from the crossover with an aperture, an adjustment is made so that the crossover becomes a parallel electron beam to irradiate the substrate in a desired sectional form. The electron beam is produced such that the unevenness of illuminance is 10% or less. Electrons emitted from the sample W are detected by a detector 25.cndot.11.
Inventors:Noji; Nobuharu (Kanagawa-ken, JP), Satake; Tohru  (Kanagawa-ken, JP), Sobukawa; Hirosi  (Kanagawa-ken, JP), Kimba; Toshifumi  (Kanagawa-ken, JP), Hatakeyama; Masahiro  (Kanagawa-ken, JP), Yoshikawa; Shoji  (Tokyo, JP), Murakami; Takeshi  (Tokyo, JP), Watanabe; Kenji  (Kanagawa-ken, JP), Karimata; Tsutomu  (Kanagawa-ken, JP), Suematsu; Kenichi  (Kanagawa-ken, JP), Tabe; Yutaka  (Kanagawa-ken, JP), Tajima; Ryo  (Kanagawa-ken, JP), Tohyama; Keiichi  (Kanagawa-ken, JP)
Assignee:Ebara Corporation (Tokyo, JP)
Appl. No.:10/754,623
Filed:January 12, 2004
Foreign Application Priority Data
Apr 22, 2003 [JP] 2003/117014
May 09, 2003 [JP] 2003/132304
Current U.S. Class:250/311 250/492.1 250/492.2 250/492.3 324/751 382/103 382/145 382/153 250/310 
Current International Class:G21K 7/00 (20060101) G01N 23/225 (20060101) H01J 37/28 (20060101)
U.S. Patent Documents
20020028399March 2002Nakasuji et al.
20020033449March 2002Nakasuji et al.
20020036264March 2002Nakasuji et al.
20020088940July 2002Watanabe et al.
20020109090August 2002Nakasuji et al.
20020117635August 2002Shinada et al.
20020130262September 2002Nakasuji et al.
20020142496October 2002Nakasuji et al.
20020148961October 2002Nakasuji et al.
20020148975October 2002Kimba et al.
20020158198October 2002Kohama et al.
20030020016January 2003Frosien
20030164460September 2003Shinada et al.
20030206027November 2003Nozoe et al.
20030207475November 2003Nakasuji et al.
20040183013September 2004Nakasuji et al.
20040222377November 2004Shinada et al.
20050045821March 2005Noji et al.
20050253066November 2005Watanabe et al.
5173719December 1992Taniguchi et al.
5373158December 1994Murakoshi et al.
5578821November 1996Meisberger et al.
5909030June 1999Yoshitake et al.
6246775June 2001Nakamura et al.
6365897April 2002Hamashima et al.
6389152May 2002Nakamura et al.
6479819November 2002Hamashima et al.
6532795March 2003Brammer et al.
6583634June 2003Nozoe et al.
6593152July 2003Nakasuji et al.
6703850March 2004Nozoe et al.
6797954September 2004Shinada et al.
6865288March 2005Shishido et al.
Foreign Patent Documents
11-242943Sep., 1999JP
2001-22935Jan., 2001JP
2001-256915Sep., 2001JP
2002-139465May., 2002JP
2002-184674Jun., 2002JP
2002-208370Jul., 2002JP
2002-289130Oct., 2002JP
2003-115274Apr., 2003JP
7-297266Nov., 1995JP
WO 02/056332Jul., 2002WO
Primary Examiner: Lee; John R.
Assistant Examiner: Souw; Bernard E.
Attorney, Agent or Firm:Westerman, Hattori, Daniels & Adrian, LLP.
Claims

What is claimed is:
1. An electron beam apparatus comprising: an electron gun for irradiating a sample with an electron beam; an integration-type line image (TDI) sensor for detecting and imaging electrons having image information of a surface of the sample generated by the beam irradiation of the sample and integrating the image of the surface of the sample to increase the contrast of the image; an image processing system for synthesizing as an image said electrons made to form the magnified image on said TDI sensor; and means for sequentially scanning a belt-like area on said sample, in which after said belt-like area scanned, said sample is moved stepwise to scan next said belt-like area, so that an overlapping width of said belt-like areas adjacent to each other can be adjusted.

2. The electron beam apparatus according to claim 1, wherein said electrons are at least one of secondary electrons, reflection electrons and back-scattered electrons, generated from said sample.

3. The electron beam apparatus according to claim 1, wherein said electrons are mirror electrons reflected near the surface of said sample.

4. The electron beam apparatus according to claim 1, wherein after scanning in one direction, said scanning means can scan in a direction opposite to the direction.

5. The electron beam apparatus according to claim 1, wherein the scanning speed of said scanning means is an integral multiple of a pixel size.

6. The electron beam apparatus according to claim 1, wherein the scanning speed of said scanning means is a product of the pixel size and the line frequency of a TDI.

7. The electron beam apparatus according to claim 6, wherein scanning speed of said scanning means can be changed according to the pixel size.

8. An electron beam apparatus comprising: an electron gun for irradiating a sample with an electron beam; a stage for holding and moving the sample in a direction; an electro-optical system for magnifying and projecting electrons having information of the surface of said sample with irradiation of said electron beam to said sample to form a magnified image on a detector; wherein said detector is a time delay integration sensor; an image processing system for synthesizing as an image said electrons made to form the magnified image on said detector; and a deflector for separating said electron beam from said electrons using at least of an electric field and a magnetic field, wherein a direction in which said deflector deflects a bundle of said electrons is matched with a direction of signal integration of said time delay integration sensor corresponding to the direction of said stage movement.

9. The electron beam apparatus according to claim 8, wherein said electrons are at least one of secondary electrons, reflection electrons and back-scattered electrons, generated from said sample.

10. The electron beam apparatus according to claim 8, wherein said electrons are mirror electrons reflected near the surface of said sample.

11. The electron beam apparatus according to claim 8, further comprising a stage capable of holding said sample and continuously moving along at least one axis on the surface of the sample, a direction of movement of said stage being matched with a direction of signal integration of said semiconductor imaging element.

12. A substrate inspection apparatus for inspecting the surface of a substrate using an electron beam, comprising: a cassette for holding a substrate; a transportation robot having a robot hand capable of transporting substrates of a plurality of sizes; a stage apparatus comprising an electrostatic chuck capable of adsorbing and fixing the substrates of a plurality of sizes by using a correction ring; an electron gun for irradiating an electron beam to the surface of said substrate; a detector for detecting electrons having information of the surface of said substrate; an image processing apparatus for obtaining an image of the surface of said substrate from said detected electrons; and a calculation device for comparing and inspecting the surfaces of said substrates.

13. The substrate inspection apparatus according to claim 12, wherein said electrostatic chuck has a plurality of correction rings appropriate to the size of said substrate.

14. The substrate inspection apparatus according to claim 13, wherein said correction ring has a dropping mechanism appropriate to the size of said substrate.

15. The substrate inspection apparatus according to claim 12, wherein said robot hand has a substrate dropping portion appropriate to the size of said substrate.

16. The substrate inspection apparatus according to claim 12, further comprising load lock chamber for said transportation robot to place said substrate in the correction ring, and a pre-aligner provided in a range of activation of said transportation robot for correcting alignment of said substrate wit respect to the correction ring.

17. The substrate inspection apparatus according to claim 16, wherein said load lock chamber comprises a multiple-stage elevator mechanism for carrying said wafer as an inspection object in said stage apparatus, and carrying inspected said substrate out of said stage apparatus.

18. The substrate inspection apparatus according to claim 16, wherein a site for replacement of said correction ring is provided within the range of activation of said transportation robot.

19. A detector positioning method in a substrate inspection apparatus, said method comprising the steps of: rotating a detector by a very small angle with respect to a stage apparatus, and performing scan imaging by said detector for each rotation to quantitatively evaluate a quality of an image; calculating a function indicating a relation between a position of rotation of said detector and said image quality; and determining an optimum value of the position of rotation of said detector from said function, and aligning said detector in a position corresponding to said optimum value.

20. The positioning method according to claim 19, wherein said stage apparatus, said detector is housed in a lens column, said lens column being separated into an upper lens column and a lower lens column, and said detector being mounted on said upper lens column.

21. The positioning method according to claim 20, further comprising a seal provided between said upper lens column and said lower lens column for keeping the inside of said lens column under vacuum.

22. The positioning method according to claim 21, wherein a space containing said seal portion is connected to an exhaust channel.
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an inspection apparatus inspecting defects or the like of a pattern formed on the surface of an inspection object using an electron beam, and particularly relates to an inspection apparatus irradiating an electron beam to the inspection object and capturing secondary electrons modified according to properties of the surface thereof to form image data, and inspecting in high throughput a pattern or the like formed on the surface of the inspection object based on the image data, and a device production process of producing a device in a high yield using the inspection apparatus as used for detection of wafer defects in semiconductor manufacturing. More specifically, the present invention relates to a detection apparatus with a projection electron microscope system using broad beams, and a device production process using the apparatus.

In a semiconductor process, the design rule is about to move into an era of 100 nm, and the type of production is now making a transition from low variety and large production represented by DRAM to high variety and small production found in SOC (Silicon on chip). Accordingly, the number of production steps increases, improvement in yield for each step becomes essential, and inspection of defects coming from the process becomes important. The present invention relates to an apparatus for use in inspection of a wafer or the like after each step in the semiconductor process, and relates to an inspection process and apparatus using an electron beam or a device production process using the same.

2. Description of the Related Art

As semiconductor devices is highly integrated, and patterns becomes finer, a high resolution and high throughput inspection apparatus is required. For inspecting defects of a wafer substrate having a 100 nm design rule, pattern defects or defects of particle vias in wiring having a line width of 100 nm or smaller and electric defects thereof should be observed, and hence a resolution of 100 nm or lower is required, and the inspection quantity increases due to an increase in the number of production steps resulting from high integration of the device, and therefore high throughput is required. Furthermore, as the device is increasingly multilayered, the inspection apparatus is required to have a function of detecting a contact failure (electric defects) of vias for connection of wiring between layers. Currently, optical defect inspection apparatuses are mainly used, but defect inspection apparatuses using electron beams are expected to go mainstream in stead of the optical defect inspection apparatus in terms of resolution and inspection of contact failure. However, the electron beam-type defect inspection apparatus has a disadvantage, i.e. it is inferior in throughput to the optical type.

Thus, development of an inspection apparatus having a high resolution and high throughput and being capable of detecting electric detects is required. It is said that the resolution of the optical type is maximum 1/2 of the wavelength of light used, which is equivalent to about 0.2 .mu.m for commercially practical visible light, for example.

On the other hand, for the type using an electron beam, a scanning electron beam type (SEM type) is usually commercially available, the resolution is 0.1 .mu.m and the inspection time is 8 hours/wafer (200 mm wafer). The electron beam type has a remarkable characteristic such that electric defects (breakage of wiring, poor conduction, poor conduction of vias and the like) can be inspected, but the inspection speed is very low, and development of a defect inspection apparatus performing inspection at a high speed is expected.

Generally, the inspection apparatus is expensive, inferior in throughput to other process apparatuses, and is therefore used after an important step, for example, etching, film formation, or CMP (chemical mechanical polishing) planarization processing under present circumstances.

The inspection apparatus of the scanning type using an electron beam (SEM) will be described. The SEM type inspection apparatus reduces the size of an electron beam (the beam diameter corresponds to the resolution), and scans the beam to irradiate a sample in a line form. On the other hand, a stage is moved in a direction perpendicular to the scanning direction of the electron beam to irradiate an observation area with the electron beam in a plain form. The scan width of the electron beam is generally several hundreds .mu.m. Secondary electrons generated from the sample by irradiation with the size-reduced electron beam (refereed to as primary electron beam) are detected with a detector (scintillator+photomultiplier (photomultiplier tube) or a semiconductor-type detector (PIN diode type) or the like). Coordinates of the irradiation position and the amount of secondary electrons (signal intensity) are synthesized into an image, and the image is stored in a storage device, or outputted onto a CRT (cathode ray tube). The principle of the SEM (scanning electron microscope) has been described above, and defects of a semiconductor (usually Si) wafer in a step on progress are detected from the image obtained by this process. The inspection speed (corresponding to throughput) depends on the amount of primary electron beams (current value), the beam diameter and the response speed of the detector. 0.1 .mu.m of beam diameter (that can be considered as resolution), 100 nA of current value and 100 MHz of detector response speed are maximum values at present and in this case, it is said that the inspection speed is about 8 hours per wafer having a diameter of 20 cm. The serious problem is that this inspection speed is very low compared to the optical type ( 1/20 or less of that of the optical type). Particularly, pattern defects and electric defects of a device pattern of a design rule of 100 nm or smaller formed on the wafer, i.e. of a line width of 100 nm, a via with the diameter of 100 nm or smaller and the like, and a contaminant of 100 nm or smaller can be detected at a high speed.

For the SEM-type inspection apparatus described above, the above inspection speed is considered as a limit, and a new type of inspection apparatus is required for further enhancing the speed, i.e. increasing the throughput.

SUMMARY OF THE INVENTION

For meeting the needs, the present invention provides an electron beam apparatus comprising means for irradiating an electron beam to a sample, means for guiding to a detector electrons obtaining information about the surface of the above described sample by the irradiation of the electron beam to the above described sample, and means for synthesizing as an image the electrons being guided to the detector and obtaining information about the surface of the above described sample,

wherein the illuminance of the above described electron beam in an area of the above described sample illuminated with the above described electron beam is uniform.

The electrons obtaining information about the surface of the above described sample are desirably at least one of secondary electrons, reflection electrons and back-scatter electrons, or mirror electrons reflected from the vicinity of the surface of the above described sample.

By the inspection process or inspection apparatus of the present invention, defects of a substrate of a wafer or the like having wiring with the line width of 100 nm or smaller can be inspected.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows the overall configuration of a semiconductor inspection apparatus;

FIG. 2 shows the overall configuration of the apparatus of FIG. 1;

FIG. 3 shows the overall configuration of the apparatus of FIG. 1 in terms of functions;

FIG. 4 shows main components of an inspection unit of the apparatus of FIG. 1;

FIG. 5 shows main components of the inspection unit of the apparatus of FIG. 1;

FIG. 6 shows main components of the inspection unit of the apparatus of FIG. 1;

FIG. 7 shows main components of the inspection unit of the apparatus of FIG. 1;

FIG. 8 shows main components of the inspection unit of the apparatus of FIG. 1;

FIG. 9 shows main components of the inspection unit of the apparatus of FIG. 1;

FIG. 10 shows main components of the inspection unit of the apparatus of FIG. 1;

FIG. 11 shows a jacket of the apparatus of FIG. 1;

FIG. 12 shows the jacket of the apparatus of FIG. 1;

FIG. 13 is an elevational view showing main components of the semiconductor inspection apparatus according to the present invention;

FIG. 14 is a front view showing main components of the semiconductor inspection apparatus according to the present invention;

FIG. 15 shows one example of the configuration of a cassette holder of the semiconductor inspection apparatus according to the present invention;

FIG. 16 shows the configuration of a mini-environment apparatus of the semiconductor inspection apparatus according to the present invention;

FIG. 17 shows the configuration of a loader housing of the semiconductor inspection apparatus according to the present invention;

FIG. 18 shows the configuration of the loader housing of the semiconductor inspection apparatus according to the present invention;

FIGS. 19(A) and 19(B) illustrate an electrostatic chuck for use in the semiconductor inspection apparatus according to the present invention;

FIG. 20 illustrates the electrostatic chuck for use in the semiconductor inspection apparatus according to the present invention;

FIGS. 20-1(A) and 21-1(B) illustrate another example of the electrostatic chuck for use in the semiconductor inspection apparatus according to the present invention;

FIG. 21 illustrates a bridge tool for use in the semiconductor inspection apparatus according to the present invention;

FIG. 22 illustrates another example of the bridge tool for use in the semiconductor inspection apparatus according to the present invention;

FIG. 22-1 illustrates the configuration and operation procedures (A) to (C) of an elevator mechanism in a load lock chamber of FIG. 22;

FIG. 22-2 illustrates the configuration and operation procedures (D) to (F) of the elevator mechanism in a load lock chamber of FIG. 22;

FIG. 23 shows an alteration example of a method of supporting a main housing in the semiconductor inspection apparatus according to the present invention;

FIG. 24 shows an alteration example of the method of supporting a main housing in the semiconductor inspection apparatus according to the present invention;

FIG. 25-1 shows the configuration of an electro-optic system of a projection electron microscope type beam inspection apparatus of the semiconductor inspection apparatus according to the present invention;

FIG. 25-2 shows the configuration of the electro-optic system of the scanning electron beam inspection apparatus of the semiconductor inspection apparatus according to the present invention;

FIG. 25-3 schematically shows one example of the configuration of a detector rotation mechanism of the semiconductor inspection apparatus according to the present invention;

FIG. 25-4 schematically shows one example of the configuration of the detector rotation mechanism of the semiconductor inspection apparatus according to the present invention;

FIG. 25-5 schematically shows one example of the configuration of the detector rotation mechanism of the semiconductor inspection apparatus according to the present invention;

FIG. 26 is the first embodiment of the semiconductor inspection apparatus according to the present invention;

Diagrams (1) to (5) of FIG. 27-1 each illustrate a shape of a sample irradiating beam;

Diagrams (1-1) to (4) of FIG. 27-2 each illustrate an irradiation form of a linear beam;

FIG. 28 illustrates secondary electrons being taking out from a column in the semiconductor inspection apparatus according to the present invention;

FIG. 29 shows the second embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 30 shows the third embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 31 shows the fourth embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 32 shows the fifth embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 33 illustrates an irradiation area covering an observation area;

FIG. 34 illustrates the irradiation form and irradiation efficiency;

FIG. 35 shows the sixth embodiment of the semiconductor inspection apparatus according to the present invention, and shows the configuration of a detection system using a relay lens;

FIG. 36 shows the sixth embodiment of the semiconductor inspection apparatus according to the present invention, and shows the configuration of a detection system using an FOP;

FIGS. 37(A) and 37(B) show the eighth embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 38 is a graph showing dependency of the transmittance on the diameter of an opening;

FIG. 39 shows a specific example of an electron detection system in the apparatus of FIG. 37;

FIGS. 40(A) and (B) illustrate requirements for operating the electron detection system in the apparatus of FIG. 37 in three modes;

FIG. 41 shows the configuration of an E.times.B unit of the semiconductor inspection apparatus according to the present invention;

FIG. 42 is a sectional view along the line A of FIG. 41;

FIG. 43 shows the ninth embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 44 shows simulation of an electric field distribution;

FIG. 45 shows the configuration of a power supply unit of the semiconductor inspection apparatus according to the present invention;

FIG. 46 shows a circuit system generating a direct-current voltage in the power supply unit shown in FIG. 45;

FIG. 47 shows one example of the circuit configuration of a static bipolar power supply of the power supply unit shown in FIG. 45;

FIG. 48 shows a special power supply in the power supply unit shown in FIG. 45;

FIG. 49 shows a special power supply in the power supply unit shown in FIG. 45;

FIG. 50 shows a special power supply in the power supply unit shown in FIG. 45;

FIG. 51 shows one example of a power supply circuit for a retarding chuck in the power supply unit shown in FIG. 45;

FIG. 52 shows one example of the hardware configuration of an EO correcting deflection voltage in the power supply unit shown in FIG. 45;

FIG. 53 shows one example of the circuit configuration of an octupole conversion unit in the power supply unit shown in FIG. 45;

FIG. 54(A) shows one example of the circuit configuration of a high-speed and high-voltage amplifier in the power supply unit shown in FIG. 45, and FIG. 54(B) shows an output waveform;

FIG. 55 shows the first embodiment of a precharge unit of the semiconductor inspection apparatus shown in FIG. 13;

FIG. 56 shows the second embodiment of a precharge unit of the semiconductor inspection apparatus shown in FIG. 13;

FIG. 57 shows the third embodiment of a precharge unit of the semiconductor inspection apparatus shown in FIG. 13;

FIG. 58 shows the fourth embodiment of a precharge unit of the semiconductor inspection apparatus shown in FIG. 13;

FIG. 59 shows an imaging apparatus comprising the precharge unit shown in FIGS. 55 to 58;

FIG. 60 illustrates the operation of the apparatus of FIG. 59;

FIG. 61 shows another example of configuration of a defect inspection apparatus comprising the precharge unit;

FIG. 62 shows an apparatus for converting a secondary electron image signal into an electric signal in the apparatus shown in FIG. 61;

FIG. 63 is a flow chart illustrating the operation of the apparatus shown in FIG. 61;

FIGS. 64(a), 64(b) and 64(c) show a method for detecting defects in the flow chart of FIG. 63;

FIG. 65 shows another example of configuration of the defect inspection apparatus comprising the precharge unit;

FIG. 66 shows still another example of configuration of the defect inspection apparatus comprising the precharge unit;

FIG. 67 illustrates the operation of a control system of the semiconductor inspection apparatus according to the present invention;

FIG. 68 illustrates the operation of the control system of the semiconductor inspection apparatus according to the present invention;

FIG. 69 illustrates the operation of the control system of the semiconductor inspection apparatus according to the present invention;

FIG. 70 illustrates the operation of the control system of the semiconductor inspection apparatus according to the present invention;

FIG. 71 illustrates the operation of the control system of the semiconductor inspection apparatus according to the present invention;

FIG. 72 illustrates the operation of the control system of the semiconductor inspection apparatus according to the present invention;

FIG. 73 illustrates the operation of the control system of the semiconductor inspection apparatus according to the present invention;

FIG. 74 illustrates an alignment procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 75 illustrates the alignment procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 76 illustrates the alignment procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 77 illustrates a defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 78 illustrates the defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 79 illustrates the defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIGS. 80(A) and 80(B) illustrate the defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 81 illustrates the defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 82 illustrates the defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 83 illustrates the defect inspection procedure in the semiconductor inspection apparatus according to the present invention;

FIG. 84 illustrates the configuration of the control system in the semiconductor inspection apparatus according to the present invention;

FIG. 85 illustrates the configuration of a user interface in the semiconductor inspection apparatus according to the present invention;

FIG. 86 illustrates the configuration of a user interface in the semiconductor inspection apparatus according to the present invention;

FIG. 87 illustrates another function and configuration of the semiconductor inspection apparatus according to the present invention;

FIG. 88 shows an electrode in another function and configuration of the semiconductor inspection apparatus according to the present invention;

FIG. 89 shows the electrode in another function and configuration of the semiconductor inspection apparatus according to the present invention;

FIG. 90 is a graph showing a voltage distribution between the wafer and an objective lens;

FIG. 91 is a flow chart illustrating the secondary electron detection operation in another function and configuration of the semiconductor inspection apparatus according to the present invention;

FIG. 92 shows a potential application mechanism in the apparatus shown in FIG. 91;

FIGS. 93(A) and 93(B) illustrate an electron beam calibration method in the apparatus shown in FIG. 91;

FIG. 94 illustrates an alignment control method in the apparatus shown in FIG. 91;

FIGS. 95(A) and 95(B) illustrate a concept of EO correction in the apparatus shown in FIG. 92;

FIG. 96 illustrates the specific apparatus configuration for EO correction in the apparatus shown in FIG. 92;

FIGS. 97(A) and 97(B) illustrate EO correction in the apparatus shown in FIG. 92;

FIG. 98 illustrates EO correction in the apparatus shown in FIG. 92;

FIG. 99 illustrates EO correction in the apparatus shown in FIG. 92;

FIG. 100 illustrates EO correction in the apparatus shown in FIG. 92;

FIG. 101 illustrates the idea of a TDI transfer clock;

FIG. 102 illustrates the idea of the TDI transfer clock;

FIG. 103 is a timing chart illustrating the operation of the circuit of FIG. 102;

FIG. 104 shows an alteration example of the defect inspection apparatus according to the present invention;

FIG. 105 is a flow chart illustrating the operation of the apparatus shown in FIG. 104;

FIG. 106 is a flow chart illustrating the operation of the apparatus shown in FIG. 104;

FIG. 107 is a flow chart illustrating the operation of the apparatus shown in FIG. 104;

FIG. 108 illustrates the operation of the apparatus shown in FIG. 104;

FIG. 109 illustrates the operation of the apparatus shown in FIG. 104;

FIG. 110 illustrates a semiconductor device production process according to the present invention;

FIG. 111 illustrates the semiconductor device production process according to the present invention;

FIG. 112 illustrates an inspection procedure of the semiconductor device production process according to the present invention;

FIG. 113 illustrates a basic flow of the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 114 shows a setting of an inspection object die;

FIG. 115 illustrates a setting of an inspection area in the die;

FIG. 116 illustrates the inspection procedure of the semiconductor device production process according to the present invention;

FIGS. 117(A) and 117(B) illustrate the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 118-1 shows an example of scanning where there is one inspection die in the inspection procedure in the semiconductor device production process according to the present invention;

FIG. 118-2 shows one example of the inspection die;

FIG. 119 illustrates a method for generating a reference image in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 120 illustrates an adjacent die comparison method in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 121 illustrates the adjacent die comparison method in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 122 illustrates a reference die comparison method in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 123 illustrates the reference die comparison method in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 124 illustrates the reference die comparison method in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 125 illustrates focus mapping in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 126 illustrates focus mapping in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 127 illustrates focus mapping in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 128 illustrates focus mapping in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 129 illustrates focus mapping in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 130 illustrates focus mapping in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 131 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 132 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 133 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 134 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 135 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 136 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 137 illustrates litho-margin measurement in the inspection procedure of the semiconductor device production process according to the present invention;

FIG. 138 shows one example of a stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 139 shows one example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 140 shows one example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 141 shows another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 142 shows another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 143 shows still another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 144 shows still another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 145 shows another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 146 shows another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIG. 147 shows another example of the stage apparatus in the semiconductor inspection apparatus according to the present invention;

FIGS. 148(A) and 148(B) show a conventional stage apparatus;

FIG. 149 shows an optical system and a detector in the semiconductor inspection apparatus according to the present invention;

FIGS. 150(a) and 150(b) show another embodiment of the semiconductor inspection apparatus according to the present invention;

FIG. 151 shows the electron beam apparatus of FIG. 150 in detail;

FIG. 152 shows a primary electron irradiation method in the semiconductor inspection apparatus according to the present invention;

FIG. 153 shows an embodiment of the semiconductor inspection apparatus according to the present invention, with a structure of an electrode for preventing insulation breakdown;

FIG. 154 is a table illustrating the operation of the apparatus of FIG. 153;

FIG. 155 shows the structure of the electrode in the apparatus of FIG. 153;

FIG. 156 shows the structure of the electrode in the apparatus of FIG. 153;

FIG. 157 shows the structure of the electrode in the apparatus of FIG. 153;

FIG. 158 shows the structure of the electrode in the apparatus of FIG. 153;

FIG. 159 shows the embodiment of the semiconductor inspection apparatus according to the present invention, which comprises an anti-vibration apparatus;

FIGS. 160(a) to 160(c) illustrate the apparatus of FIG. 159;

FIG. 161 illustrates the apparatus of FIG. 159;

FIG. 162 illustrates the apparatus of FIG. 159;

FIG. 163 illustrates the apparatus of FIG. 159;

FIGS. 164(a) to 164(c) illustrate a pattern matching process in the apparatus of FIG. 159;

FIG. 165 illustrates the holding of the wafer in the semiconductor inspection apparatus according to the present invention;

FIG. 166 illustrates the holding of the wafer in the semiconductor inspection apparatus according to the present invention;

FIGS. 167(a) and 167(b) illustrate the holding of the wafer in the semiconductor inspection apparatus according to the present invention;

FIG. 168 shows the electron beam apparatus comprising a chuck illustrated in FIG. 166;

FIG. 169 shows an E.times.B separator in the apparatus shown in FIG. 168;

FIG. 170 shows the E.times.B separator in the apparatus shown in FIG. 168;

FIG. 171 shows the embodiment in which the inspection apparatus according to the present invention is connected to a production line;

FIG. 172(A) schematically shows the embodiment of a projection electron microscope type apparatus capable of using secondary electrons and reflection electrons selectively;

FIG. 172(B) schematically shows the configuration of a secondary optical system of the apparatus;

FIG. 173 shows the specific configuration of a secondary electron detection system in FIG. 172(A);

FIGS. 174(A) and 174(B) illustrate different operation modes of the defect inspection apparatus shown in FIG. 172(A);

FIG. 175 shows the specific configuration of a lens of the secondary optical system of the defect inspection apparatus shown in FIG. 172(A);

FIG. 176(A) schematically shows the configuration of an alteration example of the projection electron microscope type apparatus shown in FIG. 172(A);

FIG. 176(B) illustrates a scan method of the apparatus shown in FIG. 176(A);

FIG. 177(A) schematically shows the configuration of another example of the projection electron microscope type apparatus shown in FIG. 172(A);

FIG. 177(B) illustrates the scan method of the apparatus shown in FIG. 177(A);

FIG. 178 shows the structure of a vacuum chamber and XY stage of the projection electron microscope type apparatus shown in FIG. 172(A), and an inert gas circulation pipe system therefor;

FIG. 179 shows one example of a differential pumping mechanism in FIG. 178; and

FIG. 180 schematically shows the configuration of an entire inspection system;

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of semiconductor inspection apparatus according to the present invention will be described in detail below with reference to the drawings in the following order.

Description

1. Overall Configuration 1-1) Main Chamber, Stage, Jacket of Vacuum Transportation System 1-1-1) Active Vibration Removal Table 1-1-2) Main Chamber 1-1-3) XY Stage 1-2) Laser Interference Measurement System 1-3) Inspection Unit Jacket 2. Embodiments 2-1) Transportation System 2-1-1) Cassette Holder 2-1-2) Mini-environment Apparatus 2-1-3) Main Housing 2-1-4) Loader Housing 2-1-5) Loader 2-1-6) Stage Apparatus 2-1-7) Wafer Chucking Mechanism 2-1-7-1) Basic Structure of Electrostatic Chuck
2-1-7-2) Chucking Mechanism for 200/300 Bridge Tool 2-1-7-3) Wafer Chucking Procedure 2-1-8) Apparatus Configuration for 200/300 Bridge Tool 2-2) Method for Transportation of Wafer 2-3) Electro-optical System 2-3-1) Overview 2-3-2) Details of Configuration 2-3-2-1) Electron Gun (electron beam source) 2-3-2-2) Primary Optical System 2-3-2-3) Secondary Optical System 2-3-3) E.times.B Unit (Wien filter) 2-3-4) Detector 2-3-5) Power Supply 2-4) Precharge Unit 2-5) Vacuum Pumping System 2-6) Control System 2-6-1) Configuration and Function 2-6-2) Alignment Procedure 2-6-3) Defect Inspection 2-6-4) Control System Configuration 2-6-5) User Interface Configuration 2-7) Descriptions of Other Functions and Configurations 2-7-1) Control Electrode
2-7-2) Potential Application Method 2-7-3) Electron Beam Calibration Method 2-7-4) Cleaning of Electrode 2-7-5) Alignment Control Method 2-7-6) EO Correction 2-7-7) Image Comparison Method 2-7-8) Device Production Process 2-7-9) Inspection 2-8) Inspection Process 2-8-1) Overview 2-8-2) Inspection Algorithm 2-8-2-1) Array Inspection 2-8-2-2) Random Inspection 2-8-2-3) Focus Mapping 2-8-2-4) Litho-margin Measurement 3. Other Embodiments 3-1) Alteration Example of Stage Apparatus 3-2) Other Embodiments of Electron Beam Apparatus 3-2-1) Electron Gun (lectron beam source) 3-2-2) Structure of Electrode 3-3) Embodiment for Anti-vibration Apparatus 3-4) Embodiment for Wafer Holding 3-5) Embodiment of E.times.B Separator 3-6) Embodiment of Production Line 3-7) Embodiment Using Other Electrons 3-8) Embodiment Using Secondary Electrons and Reflection Electrons

1. Overall Configuration

First, the overall configuration of the semiconductor inspection apparatus will be described.

The overall configuration of the apparatus will be described using FIG. 1. The apparatus is comprised of an inspection apparatus main body, a power supply rack, a control rack, an image processing unit, a film formation apparatus, an etching apparatus and the like. A roughing vacuum pump such as a dry pump is placed outside a clean room. The main part of the interior of the inspection apparatus main body is comprised of an electron beam optical column, a vacuum transportation system, a main housing containing a stage, a vibration removal table, a turbo-molecular pump and the like as shown in FIG. 2.

A control system comprises two CRTs and an instruction input feature (keyboard or the like). FIG. 3 shows a configuration from a viewpoint of a function. The electron beam column is mainly comprised of an electro-optical system, detection system, an optical microscope and the like. The electro-optical system is comprised of a lens and the like, and a transportation system is comprised of a vacuum transportation robot, an atmospheric transportation robot, a cassette loader, various kinds of position sensors and the like.

Here, the film formation apparatus and etching apparatus, and a cleaning apparatus (not shown) are placed side by side near the inspection apparatus main body, but they may be incorporated in the inspection apparatus main body. They are used, for example, for inhibiting the charge of a sample or cleaning the surface of the sample. If a sputtering system is used, one apparatus may have functions of both film formation and etching apparatuses.

Although not shown in the figures, associated apparatuses may be placed side by side near the inspection apparatus main body, or may be incorporated in the inspection apparatus main body depending on the purpose of use. Alternatively, the inspection apparatus may be incorporated in the associated apparatus. For example, a chemical-mechanical polishing apparatus (CMP) and the cleaning apparatus may be incorporated in the inspection apparatus main body, or a CVD (chemical vapor deposition) apparatus may be incorporated in the inspection apparatus and in this case, there are advantages that the installation area and the number of units for transportation of samples can be reduced, and transportation time can be shortened, and so on.

Similarly, the film formation apparatus such as a plating apparatus may be incorporated in the inspection apparatus main body. Similarly, the inspection apparatus may be used in conjunction with a lithography apparatus.

1-1) Main Chamber, Stage, Jacket of Vacuum Transportation System

In FIGS. 4, 5 and 6, main components of an inspection unit of the semiconductor inspection apparatus are shown. The inspection unit of the semiconductor inspection apparatus comprises an active vibration removal table 4.cndot.1 for shutting off vibration from the outside environment, a main chamber 4.cndot.2 as an inspection chamber, an electro-optical apparatus 4.cndot.3 placed on the main chamber, an XY stage 5.cndot.1 for scanning the wafer placed in the main chamber, a laser interference measurement system 5.cndot.2 for control of the motions of the XY stage, and a vacuum transportation system 4.cndot.4 accompanying the main chamber, and they are placed in positional relations shown in FIGS. 4 and 5. The inspection unit of the semiconductor inspection apparatus further comprises a jacket 6.cndot.1 for allowing environmental control and maintenance of the inspection unit, and is placed in positional relations shown in FIG. 6.

1-1-1) Active Vibration Removal Table

The active vibration removal table 4.cndot.1 has a weld platen 5.cndot.4 mounted on an active vibration removal unit 5.cndot.3, and the main chamber 4.cndot.2 as an inspection chamber, the electro-optical apparatus 4.cndot.3 placed on the main chamber, the vacuum transportation system 4.cndot.4 accompanying the main chamber and the like are held on the weld platen. In this way, vibrations in the inspection unit from the external environment can be inhibited. In this embodiment, the natural frequency is within .+-.25% of 5 Hz in the X direction, 5 Hz in the Y direction and 7.6 Hz in the Z direction, and the control performance is such that the transmission level of each axis is 0 dB or smaller at 1 Hz, -6.4 dB or smaller at 7.6 Hz, -8.6 dB or smaller at 10 Hz and -17.9 dB or smaller at 20 Hz (all under no load on the platen). In another structure of the active vibration removal table, the main chamber, the electro-optical apparatus and the like are suspended to be held. In still another structure, stone platen is mounted to hold the main chamber and the like.

1-1-2) Main Chamber

The main chamber 4.cndot.2 directly holds a turbo-molecular pump 7.cndot.2 in the lower part to achieve a certain degree of vacuum (10.sup.-4 Pa or lower) in the inspection environment, and comprises therein a high accuracy XY stage 5.cndot.1 for scanning the wafer, so that a magnetic force from outside can be blocked. In this embodiment, the following structure is provided to improve the flatness of the holding surface of the high accuracy XY stage wherever possible. A lower plate 7.cndot.3 of the main chamber is placed and fixed on an especially high flatness area 7.cndot.4 (flatness of 5 .mu.m or less in this embodiment) prepared on the weld platen. Further, a middle plate is provided as a stage holding surface in the main chamber. The middle plate is supported at three points against the lower plate of the main chamber, so that it is not directly affected by the flatness of the lower plate. In this embodiment, a support part consists of a spherical seat 7.cndot.6. The middle plate is capable of achieving a flatness of the stage holding surface at 5 .mu.m or less when loaded with the self-weight and the weight of the stage. Furthermore, to alleviate the effect of deformation of the main chamber by a change in internal pressure (from atmospheric pressure to reduced pressure of 10.sup.-4 Pa or lower) on the stage holding surface, the middle plate is fixed directly on the weld platen at near the three points at which the middle plate is supported on the lower plate.

To accurately control the XY stage, a measurement system with a laser interferometer at a stage position is installed. An interferometer 8.cndot.1 is placed under vacuum to inhibit a measurement error, and is fixed directly on a high-rigidity chamber wall 7.cndot.7 in this embodiment to reduce vibrations of the interferometer causing directly a measurement error as small as 0. Furthermore, to eliminate errors of the measurement position and the inspection position, the extended line of the measurement area by the interferometer matches the inspection area as accurately as possible. Furthermore, a motor 8.cndot.2 for XY motions of the stage is held by the chamber wall 7.cndot.7 in this embodiment, but if it is necessary that the effect of motor vibrations on the main chamber is further inhibited, the motor 8.cndot.2 is held by the weld platen 7.cndot.1 directly, and mounted on the main chamber in a structure not transferring vibrations of a bellow and the like.

The main chamber 4.cndot.2 is composed of a material having a high magnetic permeability to block the effect of an external magnetic field on the inspection area. In this embodiment, the main chamber 4.cndot.2 has permalloy and iron such as SS
400 plated with Ni as an anticorrosive coating. In another embodiment, permendur, super permalloy, electromagnetic soft iron, pure iron or the like is used. Further, it is effective to cover the periphery of the inspection area in the chamber directly with a material having a high magnetic permeability as a magnetic shielding effect.

1-1-3) XY Stage

The XY stage 5.cndot.1 can scan the wafer with high accuracy under vacuum. Strokes of X and Y are each 200 to 300 mm for the 200 mm wafer, and 300 to 600 mm for the 300 mm wafer. In this embodiment, the XY stage is driven by the motor 8.cndot.2
for driving X and Y axes fixed on the main chamber wall, and a ball screw 8.cndot.5 attached thereto via a magnetic fluid seal 8.cndot.3. In this embodiment, since the XY motions can be performed in a state in which the ball screw for driving X and Y is fixed to the chamber wall, the stage structure is as follows.

First, in the lower stage, an Y stage 7.cndot.10 is placed, and a ball screw 7.cndot.8 for driving and a cross roller guide 7.cndot.11 are installed. On the Y stage, a middle stage 7.cndot.12 having thereon a ball screw 7.cndot.14 for driving the X axis is placed, and an X stage 7.cndot.13 is mounted thereon. The middle stage and the Y stage and x stage are connected together along the Y axis by the cross roller guide. In this way, when the Y axis is shifted, the X stage is moved by the Y stage and the connection area 7.cndot.14, and the middle stage remains fixed. Another embodiment has a two-stage structure in which the middle stage is aligned with the upper stage axis. Furthermore, in the XY stage of another embodiment, the XY stage itself is driven by a linear motor. Further, a high-accuracy mirror 8.cndot.4 (the flatness is .lamda./20 or less, and the material is aluminum-deposited synthetic quartz) is installed so that measurements can be made over the entire stroke by the interferometer.

Furthermore, a .theta. stage 7.cndot.15 is placed on the XY stage for performing wafer alignment under vacuum. In the .theta. stage in this embodiment, two ultrasonic motors are placed for driving, and a linear scale is placed for position control. Various cables connected to movable parts performing X, Y and .theta. motions are clamped by cable bears each held on the X stage and the Y stage, and connected to the outside of the main chamber via a field-through provided on the chamber wall.

Specifications of this embodiment with the above structures are shown in Tables 1 and 2.

TABLE-US-00001 TABLE 1 Table specifications and characteristics No. Items Criteria Inspection process 1 X axis positioning .+-.3 [.mu.m] or less Measurement by laser length measuring repeatability (graphical representation) machine for delivery inspection with Y axis at center 2 Y axis positioning .+-.3 [.mu.m] or less Measurement by laser length measuring repeatability (graphical representation) machine for delivery inspection with X axis at center 3 .theta. positioning .+-.0.4 [sec] (.+-.2
pulses) or less Measurement by deviation pulses at the time repeatability (target) of stopping of rotation sensor. (numerical indication) Measurements are made at three points of 0.degree., 1.degree. and +1.degree. 4 X axis positioning .+-.20 [.mu.m] or less Measurement by laser length measuring accuracy (graphical representation) machine for delivery inspection with Y axis at center 5 Y axis positioning .+-.20 [.mu.m] or less Measurement by laser length measuring accuracy (graphical representation) machine for delivery inspection with X axis at center 6 X axis backlash .+-.1 [.mu.m] or less Measurement by laser length measuring (numerical indication) machine for delivery inspection with Y axis at center 7 X axis backlash .+-.1 [.mu.m] or less Measurement by laser length measuring (numerical indication) machine for delivery inspection with X axis at center 8 X axis pitching 5 [sec] or less (target) Measurement by laser length measuring (graphical representation) machine for delivery inspection with Y axis at center and both ends 9 Y axis pitching 5 [sec] or less (target) Measurement by laser length measuring (graphical representation) machine for delivery inspection with X axis at center and both ends 10 X axis yawing 5 [sec] or less (target) Measurement by laser length measuring (graphical representation) machine for delivery inspection with Y axis at center and both ends 11 Y axis pitching 5 [sec] or less (target) Measurement by laser length measuring (graphical representation) machine for delivery inspection with X axis at center and both ends 12 X axis rolling Reference value Measurement of Y axis length measuring (graphical representation) mirror by automatic collimater with Y axis at center 13 Y axis rolling Reference value Measurement of X axis length measuring (graphical representation) mirror by automatic collimater with X axis at center 14 Vertical straightness .+-.2 [.mu.m] or less Measurement by straight master and ADE (graphical representation) displacement meter. Measurements are on the cross at the center and reference values are at both ends 15 Orthogonality of X 10 [.mu.m] or less Measurement by orthogonality master and and Y axes (numerical indication) dial gage 16 Distance between 1 .+-. 0.5 [mm] Measurement by positioning laser length ORG switch and (numerical indication) measuring machine motor starting point

TABLE-US-00002 TABLE 2 System specifications and characteristics No. Items Criteria Inspection process 1. X axis lateral .+-.0.5 .mu.m or less Y axis-X axis deviation during displacement @10 mm/sec, @15 mm/sec movement from 0 to 20 mm at .+-.1.0 .mu.m or less 20 mm/sec, with Y axis at center @30 mm/sec .+-.2.0 .mu.m or less @60 mm/sec (excluding chamber vibration components during acceleration and deceleration) (graphical representation) 2. X axis positioning .+-.0.5 .mu.m or less Stop accuracy after movement accuracy (graphical representation) from 0 to 20 mm at 20 mm/sec, with Y axis at center 3. Y axis positioning .+-.0.5 .mu.m or less Stop accuracy after movement accuracy (graphical representation) from 0 to 20 mm at 20 mm/sec, with X axis at center 4. Y axis positioning .+-.3.0 .mu.m or less deviational variation after accuracy @10 mm/sec, @15 mm/sec movement at constant speed, with .+-.5.0 .mu.m or less x axis at center @30 mm/sec. @60 mm/sec (graphical representation)

1-2) Laser Interference Measurement System

The laser interference measurement system is comprised of a laser optical system having an optical axis which is parallel to X and Y axes and has an inspection position on its extended line, and an interferometer 8.cndot.1 placed therebetween. The optical system in this embodiment is placed in positional relations shown in FIGS. 9 and 10. Laser light emitted from a laser 9.cndot.1 placed on the weld platen is erected upright by a bender 9.cndot.2, and then bent to be parallel with a measurement plane by a bender 10.cndot.1. Further, the laser light is split into light for X axis measurement and light for Y axis measurement by a splitter 9.cndot.4, then bent to be parallel with the Y axis and the X axis by a bender 10.cndot.3 and a bender 9.cndot.6, respectively, and guided into the main chamber.

An adjustment method in starting the optical system will be described below. First, an adjustment is made so that laser light emitted from the laser is bent perpendicularly by the bender 9.cndot.2, and bent horizontally by the bender 10.cndot.1. Then, the bender 10.cndot.3 is adjusted so that an optical axis of light bent by the bender 10.cndot.3 and reflected by a mirror 8.cndot.4 placed accurately perpendicularly to the Y axis and returned perfectly matches an optical axis of incident light. By making an observation of the optical axis just behind the laser with the interferometer removed so as not to interrupt reflected light, an accurate adjustment can be made. Furthermore, the optical axis adjustment of the X axis can be performed independently with the splitter 9.cndot.4 and the bender 9.cndot.6 after performing the optical axis adjustment of the Y axis. The adjustment can be performed as that of the Y axis. Further, after the axes of incident light and reflected light of the X axis and the Y axis are adjusted, the intersection point of the optical axes (assuming that no mirror exists) should be made to match the wafer inspection position. As a result, a bracket fixing the bender 10.cndot.3 can move perpendicularly to the Y axis, and a bracket fixing the bender 9.cndot.6 can move perpendicularly to the X axis with incident light and reflected light perfectly matching each other. Further, the bender 10.cndot.1, the splitter 9.cndot.4, the bender 10.cndot.3 and the bender
9.cndot.6 can desirably move vertically while retaining their respective positional relations.

Furthermore, a method for adjustment of optical axes associated with replacement of the laser in the apparatus in operation after initiation will be described below. In the apparatus in operation in which the inside of the main chamber is kept under vacuum, the optical axis or the like having an interferometer removed has a difficulty. Thus, a tool for placing targets 10.cndot.2 at several points on an optical path outside the main chamber so that the optical path in the start can be assessed only outside the main chamber is prepared. After replacement of the laser, the adjustment made in the start can be reproduced by adjusting the optical axis with respect to the target 10.cndot.2 only with an adjustment feature provided on a laser mounting seat.

1-3) Inspection Unit Jacket

An inspection unit jacket 4.cndot.7 can be provided with a feature as a flame structure for maintenance. In this embodiment, a containable twin crane 11.cndot.1 is provided on the upper part. The crane 11.cndot.1 is mounted on a traverse rail
11.cndot.2, and the traverse rail is placed on a traveling rail (longitudinal) 11.cndot.3. The traveling rail is usually housed as shown in FIG. 11, during maintenance, the traveling rail rises as shown in FIG. 12, so that the stroke in the vertical direction of the crane can be increased. Consequently, an electro-optical apparatus 4.cndot.3, a main chamber top plate and the XY stage 5.cndot.1 can be attached to/detached from the back face of the apparatus by the crane included in the jacket during maintenance. Another embodiment of the crane included in the jacket has a crane structure having a rotatable open-sided axis.

Furthermore, the inspection unit jacket can also have a function as an environment chamber. This has an effect of magnetic shielding along with control of temperature and humidity as required.

2. Embodiments

Preferred embodiments of the present invention will be described below as a semiconductor inspection apparatus inspecting a substrate, i.e. a wafer having a pattern formed on the surface as an inspection object, with reference to the drawings.

2-1) Transportation System

FIGS. 13 and 14 show main components of the semiconductor inspection apparatus according to the present invention with an elevational view and a front view. This semiconductor inspection apparatus 13.cndot.1 comprises a cassette holder
13.cndot.2 holding cassettes each containing a plurality of wafers, a mini-environment apparatus 13.cndot.3, a loader housing 13.cndot.5 constituting a working chamber, a loader 13.cndot.7 loading the wafer from the cassette holder 13.cndot.2 to a stage apparatus 13.cndot.6 placed in a main housing 13.cndot.4, and an electro-optical apparatus 13.cndot.8 placed in a vacuum housing, and they are placed in positional relations shown in FIGS. 13 and 14.

The semiconductor inspection apparatus 13.cndot.1 further comprises a precharge unit 13.cndot.9 placed in the vacuum main housing 13.cndot.4, a potential application mechanism applying a potential to the wafer, an electron beam calibration mechanism, and an optical microscope 13.cndot.11 constituting an alignment control apparatus 13.cndot.10 for positioning the wafer on the stage apparatus.

2-1-1) Cassette Holder

The cassette holder 13.cndot.2 holds a plurality of cassettes 13.cndot.12 (two cassettes in this embodiment) (e.g. closed cassettes such as SMIF and FOUP manufactured by Assist Co. Ltd.) each containing a plurality of wafers (e.g. 25 wafers) housed with arranged vertically in parallel. The cassette holder 13.cndot.2 may be freely selected and placed such that if cassettes are conveyed by a robot or the like and automatically loaded into the cassette holder 13.cndot.2, the cassette holder
13.cndot.2 having a structure suitable for this arrangement is selected, and if cassettes are manually loaded, the cassette holder having an open cassette structure suitable for this arrangement is selected. In this embodiment, the cassette holder
13.cndot.2 has a form in which the cassettes 13.cndot.12 are automatically loaded, and for example, a lift table 13.cndot.13, and a lift mechanism 13.cndot.14 vertically moving the lift table 13.cndot.13, wherein the cassette 13.cndot.12 can be automatically set on the lift table 13.cndot.13 in a state shown by a chain line in FIG. 14, and after the cassette 13.cndot.12 is set, it is automatically rotated to a state shown by a solid line in FIG. 14, and directed to a rotation axis line of a first transportation unit in the mini-environment apparatus.

Furthermore, the lift table 13.cndot.13 is descended to a state shown by a chain line in FIG. 13. In this way, a cassette holder having a well known structure may be used as appropriate for any of the cassette holder to be used when the cassette is automatically loaded and the cassette holder when the cassette is manually loaded, and detailed descriptions of their structures and functions are not presented.

In another embodiment, as shown in FIG. 15, a plurality of 300 mm substrates are housed in a trench pocket (not described) fixed in a box main body 15.cndot.1, and are conveyed, stored and so on. A substrate transportation box 15.cndot.2 is comprised of the prismatic box main body 15.cndot.1, a substrate loading/unloading door 15.cndot.3 communicating with a substrate loading/unloading door automatic opening/closing apparatus so that an opening on the side face of the box main body
15.cndot.1 can be mechanically opened and closed, a lid 15.cndot.4 located opposite to the opening and covering openings for attachment and detachment of filters and a fan motor, the trench pocket (not shown) for holding a substrate W (FIG. 13), an ULPA filter 15.cndot.5, a chemical filter 15.cndot.6 and a fan motor 15.cndot.7. In this embodiment, substrates are loaded/unloaded by a robot-type first transportation unit 15.cndot.7 of the loader 13.cndot.7.

Furthermore, the substrate or wafer housed in the cassette 13.cndot.12 is to be inspected, and such inspection is performed after or during a process of processing the wafer during the semiconductor production step. Specifically, the substrate or wafer undergoing a film formation step, CMP, ion implantation and the like, the wafer having a wiring pattern formed on the surface, or the wafer having no wiring pattern yet formed on the surface is housed in the cassette. For the wafer housed in the cassette 12.cndot.12, a large number of wafers are spaced vertically and arranged in parallel, and therefore an arm of the first transportation unit can be moved vertically so that they can be held by the wafer at any position and the first transportation unit described later. Furthermore, the cassette is provided with a feature for controlling a moisture content in the cassette to prevent oxidization and the like of the wafer surface after the process. For example, a dehumidifying agent such as silica gel is placed in the cassette. In this case, any dehumidifying agent having an effect of dehumidification may be used.

2-1-2) Mini-Environment Apparatus

In FIGS. 13 to 16, the mini-environment apparatus 13.cndot.3 comprises a housing 16.cndot.2 constituting a mini-environment space 16.cndot.1 arranged for undergoing control of the atmosphere, a gas circulating apparatus 16.cndot.3 for circulating a gas such as cleaning air in the mini-environment space 16.cndot.1 to control the atmosphere, a discharge apparatus 16.cndot.4 collecting and discharging part of air supplied into the mini-environment space 16.cndot.1, and a pre-aligner 16.cndot.5
placed in the mini-environment space 16.cndot.1 to roughly position the substrate or wafer as an inspection object.

The housing 16.cndot.2 has a top wall 16.cndot.6, a bottom wall 16.cndot.7 and a circumference wall 16.cndot.8 surrounding the circumference, and isolates the mini-environment space 16.cndot.1 from outside. To atmosphere-control the mini-environment space 16.cndot.1, the gas circulating apparatus 16.cndot.3 comprises a gas supply unit 16.cndot.9 mounted on the top wall 16.cndot.6 to clean a gas (air in this embodiment) and flow the clean air just downward in a laminar form through one or more gas blowout holes (not shown) in the mini-environment space 16.cndot.1, a collection duct 16.cndot.10 placed on the bottom wall 16.cndot.7 to collect air flowed away toward the bottom in the mini-environment space 16.cndot.1, a conduit
16.cndot.11 connecting the collection duct 16.cndot.10 and the gas supply unit 16.cndot.9 to return the collected air back to the gas supply unit 16.cndot.9, as shown in FIG. 16.

In this embodiment, the gas supply unit 16.cndot.9 introduces about 20% of air to be supplied from outside the housing 16.cndot.2 and cleaning the air, but the ratio of the gas introduced from outside can be arbitrarily selected. The gas supply unit 16.cndot.9 comprises an HEPA or ULPA filter having a well known structure for producing clean air. The downward laminar flow, namely down flow, is principally supplied in such a manner as to flow through the transportation plane by the first transportation unit placed in the mini-environment space 16.cndot.1, described later, to prevent deposition of pasty dust occurring from the transportation unit on the wafer. Thus, a blast nozzle of the down flow is not necessarily located near the top wall as shown in the figure, but may be at any location on the upper side of the transportation plane by the transportation unit. Furthermore, it is not required to flow the gas throughout the mini-environment space 16.cndot.1.

Furthermore, in some cases, ion air can be used as clean air to ensure cleanness. Furthermore, a sensor for observing the cleanness may be provided in the mini-environment space 16.cndot.1, and the apparatus may be shut down when the cleanness drops.

An entrance 13.cndot.15 is formed in an area adjacent to the cassette holder 13.cndot.2 in the circumference wall 16.cndot.8 of the housing 16.cndot.2. A shutter apparatus having a well known structure may be provided near the entrance
13.cndot.15 to close the entrance 13.cndot.15 from the mini-environment apparatus side. The laminar down flow produced near the wafer may flow at a flow rate of 0.3 to 0.4 m/sec. The gas supply unit 16.cndot.9 may be provided outside the mini-environment space 16.cndot.1, instead of being provided inside the mini-environment space 16.cndot.1.

The discharge apparatus 16.cndot.4 comprises a suction duct 16.cndot.12 placed in the lower part of the transportation unit at a location on the lower side of the wafer transportation plane of the transportation unit, a blower 16.cndot.13 placed outside the housing 16.cndot.2 and a conduit 16.cndot.14 connecting the suction duct 16.cndot.12 and the blower 16.cndot.13. This discharge apparatus 16.cndot.4 suctions a gas flowing downward along the circumference of the transportation unit and containing dust that may occur from the transportation unit with the suction duct 16.cndot.12, and discharges the gas to outside the housing 16.cndot.2 through the conduit 16.cndot.14 and the blower 16.cndot.13. In this case, the gas may be discharged into a discharge pipe (not shown) placed near the housing 16.cndot.2.

The pre-aligner 16.cndot.5 placed in the mini-environment space 16.cndot.1 optically or mechanically detects an orientation flat (flat portion formed on the outer edge of a circular wafer, which is hereinafter referred to as ori-fla) formed on the wafer, and one or more V-type cutouts or notches formed on the outer edge of the wafer to predefine the position of the wafer in the direction of rotation about the axial line O--O with accuracy within about .+-.1.degree.. The pre-aligner 16.cndot.5
constitutes part of a mechanism determining the coordinates of an inspection object, and plays a role to roughly position the inspection object. The pre-aligner 16.cndot.5 itself may have a well known structure, and thus the structure and operation thereof are not presented.

Furthermore, although not shown in the figure, a collection duct for discharge apparatus may be provided also in the lower part of the pre-aligner 16.cndot.5 to discharge air containing dust discharged from the pre-aligner 16.cndot.5 to outside.

2-1-3) Main Housing

In FIGS. 13 to 15, the main housing 13.cndot.4 constituting the working chamber 13.cndot.16 comprises a housing main body 13.cndot.17, and the housing main body 13.cndot.17 is supported by a housing supporting apparatus 13.cndot.20 placed on a vibration blocking apparatus or anti-vibration apparatus 13.cndot.19 placed on a base frame 13.cndot.18. The housing supporting apparatus 13.cndot.20 comprises a frame structure 13.cndot.21 assembled in a rectangular form. The housing main body
13.cndot.17 is fixedly placed on the frame structure 13.cndot.21, comprises a bottom wall 13.cndot.22 placed on the frame structure, a top wall 13.cndot.23, and a circumference wall 13.cndot.24 connected to the bottom wall 13.cndot.22 and the top wall
13.cndot.23 to surround the circumference, and isolates the working chamber 13.cndot.16 from outside. In this embodiment, the bottom wall 13.cndot.22 is made of relatively thick steel plate so that the bottom wall 13.cndot.22 is not deformed by the weight of equipment such as the stage apparatus and the like placed above, but other structure may be adopted.

In this embodiment, the housing main body and the housing supporting apparatus 13.cndot.20 are made to have a rigid structure, and the anti-vibration apparatus 13.cndot.19 prevents transfer of vibrations to this rigid structure from a floor on which the base frame 13.cndot.18 is placed. An entrance 14.cndot.1 for loading/unloading the wafer is formed on an area of the circumference wall 13.cndot.24 of the housing main body 13.cndot.17 adjacent to a loader housing described later.

Furthermore, the anti-vibration apparatus 13.cndot.19 may be an active type having a pneumatic spring, magnetic bearing or the like, or may be a passive type having the same. In any case, the apparatus may have a well known structure, and therefore the structure and function of the apparatus itself are not described here. The working chamber 13.cndot.16 is kept in a vacuum atmosphere by a vacuum apparatus (not shown) having a well known structure. A control apparatus 2 for controlling the operation of the overall apparatus is placed below the base frame 13.cndot.18. The pressure of the main housing is usually at 10.sup.-4 to 10.sup.-6 Pa.

2-1-4) Loader Housing

In FIGS. 13 to 15 and FIG. 17, the loader housing 13.cndot.5 comprises a housing main body 14.cndot.4 constituting a first loading chamber 14.cndot.2 and a second loading chamber 14.cndot.3. The housing main body 14.cndot.4 has a bottom wall
17.cndot.1, a top wall 17.cndot.2, a circumference wall 17.cndot.3 surrounding the circumference, and a partition wall 14.cndot.5 partitioning the first loading chamber 14.cndot.2 and the second loading chamber 14.cndot.3, and can isolate both the loading chambers from outside. The partition wall 14.cndot.5 is provided with an opening or entrance 17.cndot.4 to give and take the wafer between the loading chambers. Furthermore, entrances 14.cndot.6 and 14.cndot.7 are formed in areas of the circumference wall 17.cndot.3 adjacent to the mini-environment apparatus and the main housing.

The housing main body 14.cndot.4 of the loader housing 13.cndot.5 is placed and supported on a frame structure 13.cndot.21 of the housing supporting apparatus 13.cndot.20. Thus, transfer of vibrations of the floor to the loader housing
13.cndot.5 is also prevented. The entrance 14.cndot.6 of the loader housing 13.cndot.5 is matched with an entrance 13.cndot.25 of the housing 16.cndot.2 of the mini-environment apparatus 13.cndot.3, and there a shutter apparatus 14.cndot.8 selectively inhibiting communication between the mini-environment space 16.cndot.1 and the first loading chamber 14.cndot.2 is provided.

The shutter apparatus 14.cndot.8 has a seal material 13.cndot.26 surrounding the periphery of entrances 13.cndot.25 and 14.cndot.6 and fixed in close contact with a side wall 17.cndot.3, a door 13.cndot.27 inhibiting passage of air through the entrance in cooperation with the seal material 13.cndot.26, and a drive apparatus 13.cndot.28 driving the door. Furthermore, the entrance 14.cndot.7 of the loader housing 13.cndot.5 is matched with the entrance 14.cndot.1 of the housing main body
13.cndot.17, and there a shutter apparatus 13.cndot.29 selectively seal-inhibiting communication between the second loading chamber 14.cndot.3 and the working chamber 13.cndot.16 is provided. The shutter apparatus 13.cndot.29 has a seal material
13.cndot.30 surrounding the periphery of entrances 14.cndot.7 and 14.cndot.1 and fixed in close contact with side walls 17.cndot.3 and 13.cndot.24, a door 14.cndot.9 inhibiting passage of air through the entrance in cooperation with the seal material
13.cndot.30, and a drive apparatus 13.cndot.31 driving the door.

Further, an opening formed in the partition wall 14.cndot.5 is provided with a shutter apparatus 14.cndot.10 selectively seal-inhibiting communication between first and second loading chambers by closing the opening with the door. The shutter apparatuses 14.cndot.8, 13.cndot.29 and 414.cndot.10 can air-tightly seal the chambers when they are in a closed state. These shutter apparatuses may be well known shutter apparatuses, and therefore detailed descriptions of the structures and functions thereof are not presented.

Furthermore, a method of supporting the housing 16.cndot.2 of the mini-environment apparatus 13.cndot.3 is different from a method of supporting the loader housing, and to prevent vibrations from the floor from being transferred through the mini-environment apparatus 13.cndot.3 to the loader housing 13.cndot.5 and the main housing 13.cndot.4, a cushion material for prevention of vibrations may be so situated as to air-tightly surround the periphery of the entrance between the housing
16.cndot.2 and the loader housing 13.cndot.5.

In the first loading chamber 14.cndot.2 is provided a wafer rack 14.cndot.11 supporting a plurality of wafers (two wafers in this embodiment) in a horizontal state with the plurality of wafers spaced vertically. As shown in FIG. 18, the wafer rack 14.cndot.11 has poles 18.cndot.2 mutually spaced and fixed upright at four corners of the rectangular substrate 18.cndot.1, two-stage support portions 18.cndot.3 and 18.cndot.4 are formed on each pole 18.cndot.2, and the periphery of the wafer W is borne on the support portion to hold the wafer. The leading ends of the arms of first and second transportation units described later are brought close to the wafer from between adjacent poles to hold the wafer by the arms.

Loading chambers 14.cndot.2 and 14.cndot.3 can be atmosphere-controlled to be in a high vacuum state (degree of vacuum is 10.sup.-4 to 10.sup.-6 Pa) by a vacuum pumping apparatus (not shown) having a well known structure including a vacuum pump (not shown). In this case, the first loading chamber 14.cndot.2 is kept in low vacuum atmosphere as a low vacuum chamber, and the second loading chamber 14.cndot.3 is kept in a high vacuum atmosphere as a high vacuum chamber, thus making it possible to effectively prevent contamination of the wafer. By employing this structure, the wafer which is housed in the loading chamber and is to be inspected for defects next can be conveyed into the working chamber without delay. By employing this loading chamber, together with the principle of a multi-beam electron apparatus described later, the throughput of defect inspection can be improved, and the degree of vacuum of the periphery of an electron source required to be stored under high vacuum conditions can be kept at as high as possible.

First and second loading chambers 14.cndot.2 and 14.cndot.3 are each connected to an evacuation pipe and a vent pipe for inert gas (e.g. dry pure nitrogen) (not shown). Consequently, the atmospheric pressure state in each loading chamber is achieved with inert gas ventilation (introducing an inert gas to prevent deposition on the surface of gases such as oxygen gas other than the inert gas). The apparatus itself for inert gas ventilation may have a well known structure, and therefore detailed descriptions thereof are not presented.

Furthermore, in the inspection apparatus of the present invention using an electron beam, it is important that such a material as, typically, lantern hexaboride (L.sub.aB.sub.6) used for an electron source of an electro-optical system described later is prevented as much as possible from contacting oxygen and the like in order to prolong the life of the electron source, when the material is heated to such a high temperature that thermal electrons are emitted. This can be more reliably accomplished by performing the atmosphere control described above in the pre-stage where the wafer is loaded into the working chamber in which the electro-optical system is placed.

2-1-5) Loader

The loader 13.cndot.7 comprises a robot-type first transportation unit 16.cndot.14 placed in the housing 16.cndot.2 of the mini-environment apparatus 13.cndot.3, and a robot-type second transportation unit 14.cndot.12 placed in the second loading chamber 14.cndot.3.

The first transportation unit 16.cndot.14 has a multi-nodular arm 16.cndot.16 capable of rotating about an axial line O.sub.1--O.sub.1 with respect to a drive unit 16.cndot.15. The multi-nodular arm may have any structure, but in this embodiment, it has mutually rotatably attached three parts.

One part of the arm 16.cndot.16 of the first transportation unit 16.cndot.14, namely a first part closest to the drive unit 16.cndot.15 is attached to a shaft 16.cndot.17 capable of rotating by a drive mechanism (not shown) having a well known structure, provided in the drive unit 16.cndot.15. The arm 16.cndot.16 can rotate about an axial line O.sub.1--O.sub.1 by the shaft 16.cndot.17, and can expand and contract in the radial direction with respect to the axial line O.sub.1--O.sub.1 as a whole by relative rotation among parts. A holding apparatus 14.cndot.13 holding the wafer such as a mechanical chuck or electrostatic chuck having a well known structure is provided at the leading end of a third part remotest from the shaft 16.cndot.17
of the arm 16.cndot.16. The drive unit 16.cndot.15 can be moved vertically by a lift mechanism 16.cndot.18 having a well known structure.

In this first transportation unit 16.cndot.14, the arm 16.cndot.16 extends in a direction M1 or M2 of one of two cassettes held in the cassette holder, and a wafer housed in the cassette is placed on the arm or held by a chuck (not shown) mounted on the arm at the end to take out the wafer. Thereafter, the arm contracts (into a state shown in FIG. 14), rotates to a position in which the arm can extend in a direction M3 of the pre-aligner 16.cndot.5, and stops at the position. Then, the arm extends again and places the wafer held by the arm on the pre-aligner 16.cndot.5. The arm receives the wafer from the pre-aligner 16.cndot.5 in the opposite manner, then further rotates and stops at a position in which the arm can extend toward the second loading chamber 14.cndot.2 (in direction M4), and places the wafer on a wafer seat in the second loading chamber 14.cndot.2. Furthermore, if the wafer is mechanically held, the wafer is held at its periphery (range of about 5 mm from the edge). This is because a device (circuit wiring) is formed on the entire wafer except for the periphery, and holding this area may cause destruction and failure of the device.

The second transportation unit 14.cndot.12 has a structure essentially identical to that of the first transportation unit, and the only different point is that transportation of the wafer is carried out between the wafer rack and the holding surface of the stage apparatus, and detailed descriptions thereof are not presented.

In the loader 13.cndot.7 described above, first and second transportation units 16.cndot.14 and 14.cndot.12 convey the wafer from the cassette held in the cassette holder onto the stage apparatus 13.cndot.6 placed in the working chamber
13.cndot.16 and transport the wafer in the opposite manner in almost a horizontal state, and the arm of the transportation unit moves vertically only when the wafer is taken from and inserted into the cassette, the wafer is placed onto and taken from the wafer rack, and the wafer is placed onto and taken from the stage apparatus. Thus, large wafer, for example, wafer having a diameter of 300 mm can be moved smoothly.

Since the stage has a mechanism applying a backward bias to the wafer, the arm is made to have a potential identical or close to that of the stage or a floating potential when the arm is placing the wafer onto the stage or taking the wafer from the stage, whereby a trouble such as a discharge due to potential short is avoided.

2-1-6) Stage Apparatus

The stage apparatus 13.cndot.16 comprises a fixed table 13.cndot.32 placed on the bottom wall 13.cndot.22 of the main housing 13.cndot.4, a Y table 13.cndot.33 moving in the Y direction (direction perpendicular to the sheet plane in FIG. 1) on the fixed table, an X table 13.cndot.34 moving in the X direction (lateral direction in FIG. 1) on the Y table, a rotation table 13.cndot.35 capable of rotating on the X table, and a holder 13.cndot.36 placed on the rotation table 13.cndot.35. The wafer is held on a wafer holding surface 14.cndot.14 of the holder 13.cndot.36 in a releasable manner. The holder 13.cndot.36 may have a well known structure capable of holding in a releasable manner the wafer mechanically or in an electrostatic chuck mode. The stage apparatus 13.cndot.6 uses a servo motor, and encoder and various kinds of sensors (not shown) to operate the plurality of tables described above, whereby the wafer held by the holder on the holding surface 14.cndot.14 can be positioned in the X direction, Y direction and Z direction (vertical direction in FIG. 13) with respect to an electron beam emitted from the electro-optical apparatus, and in the direction of rotation about an axial line vertical to the wafer supporting surface (.theta. direction) with high accuracy.

Furthermore, for positioning in the Z direction, for example, the position of the holding surface on the holder may be fine-adjusted in the Z direction. In this case, a reference position of the holding surface is detected by a position measurement apparatus (laser interference distance measuring apparatus using the principle of the interferometer) using a laser having a very small diameter, and the position is controlled by a feedback circuit (not shown), and/or the notch of the wafer or the position of the oriental-flat is measured to detect a plane position or rotation position of the wafer with respect to the electron beam, and a rotation table is rotated by a stepping motor or the like capable of performing control at a very small angle to control the position.

For preventing occurrence of dust in the working chamber wherever possible, servo motors 14.cndot.15 and 14.cndot.16 and encoders 14.cndot.17 and 14.cndot.18 for stage apparatus are placed outside the main housing 13.cndot.4. Furthermore, the stage apparatus 13.cndot.6 may have a well known structure, which is used in, for example, a stepper, and therefore detailed descriptions of the structure and operation are not presented. Furthermore, the laser interference distance measuring apparatus described above may have a well known structure, and therefore detailed descriptions of the structure and operation are not presented.

An obtained signal can be normalized by previously inputting the rotational position and X and Y positions of the wafer with respect to the electron beam to a signal detection system or image processing system described later. Further, a wafer chuck mechanism provided in the holder gives a voltage for chucking the wafer to an electrode of an electrostatic chuck, and holds three points (preferably equally spaced along the circumference) on the outer edge of the wafer to perform positioning. The wafer chuck mechanism comprises two fixed positioning pins, and one pressing clamp pin. The clamp pin can realize automatic chucking and automatic releasing, and comprises a conduction area for application of a voltage.

Furthermore, in this embodiment, the table moving in the lateral direction is the X table, and the table moving in the vertical direction is the Y table in FIG. 14, but the table moving in the lateral direction may be the Y table, and the table moving in the vertical direction may be the X table in this figure.

2-1-7) Wafer Chucking Mechanism

2-1-7-1) Basic Structure of Electrostatic Chuck

For matching the focus of the electro-optical system with the sample surface correctly and quickly, irregularities on the sample surface or wafer surface are preferably as small as possible. Thus, the wafer is adsorbed to the surface of an electrostatic chuck fabricated with high flatness (preferably flatness of 5 .mu.m or less).

Electrode structures of the electrostatic chuck include a unipole type and a dipole type. The unipole type is a process in which conduction is previously established on the wafer, and a high voltage (generally about several tens to hundreds V) is applied to between the wafer and one electrostatic chuck electrode to adsorb the wafer, while in the dipole type, it is not necessary to force the wafer into conduction, and the wafer can be adsorbed simply by applying positive and negative voltages to two electrostatic chucks, respectively. Generally, however, to obtain stable adsorption conditions, two electrodes should be formed into an intricate shape like comb teeth, and thus the shape of the electrode becomes complicated.

On the other hand, for inspection of the sample, a predetermined voltage (retarding voltage) should be applied to the wafer in order to obtain conditions for image forming for the electro-optical system or ensure the state of the sample surface that can be easily observed with electrons. It is necessary that this retarding voltage should be applied to the wafer, and that the electrostatic chuck should be the unipole type described above to stabilize the potential of the wafer surface. (However, as described later, the electrostatic chuck should be made to function as a dipole type until conduction with the wafer is established with a conduction needle. Thus, the electrostatic chuck has a structure capable of switching between the unipole type and the dipole type).

Thus, it is required to mechanically contact the wafer to force the wafer into conduction. However, the need for prevention of contamination of the wafer has intensified, and it is required to avoid mechanical contact with the wafer, and there are cases where contact with the edge of the wafer is not acceptable. In this case, conduction must be established on the back face of the wafer.

On the back face of the wafer, a silicon oxide film is usually formed, and it is impossible to establish conduction in this state. Thus, needles are made to contact the back face of the wafer at two or more locations, and a voltage is applied to between the needles, whereby the oxide film can be locally destructed to establish conduction with silicon as a wafer base material. The voltage applied to the needles is a DC voltage or AC voltage of several hundreds V. Furthermore, the material of the needle should be nonmagnetic, and have abrasion-resistance and a high melting point, and tungsten or the like can be considered as such a material. Furthermore, to impart durability or prevent contamination of the wafer, it is effective to coat the surface with TiN or diamond. Furthermore, to ensure that conduction with the wafer has been established, it is effective to apply a voltage to between the needles to measure a current.

It is the chucking mechanism shown in FIG. 19 that has been fabricated in view of the background described above. The electrostatic chuck is provided with electrodes 19.cndot.1 and 19.cndot.2 that desirably have an intricate shape like comb teeth to adsorb the wafer W with stability, three pusher pins 19.cndot.3 for giving and taking the wafer, and two or more conduction needles 19.cndot.4 for applying a voltage to the wafer. Furthermore, a correction ring 19.cndot.5 and a wafer dropping mechanism 19.cndot.6 are placed around the electrostatic chuck.

The pusher pin 19.cndot.3 already protrudes from the electrostatic chuck surface when the wafer W is conveyed by a robot hand, and when the wafer W is placed on the pusher pin 19.cndot.3 by the operation of the robot hand, the pusher pin
19.cndot.3 slowly descends and places the wafer W onto the electrostatic chuck. When the wafer is taken from the electrostatic chuck, the opposite operation is made to pass the wafer W to the robot hand. The surface material of the pusher pin
19.cndot.3 should be selected so as to eliminate the possibility that the wafer position is shifted, and that the wafer is contaminated, silicon rubber, fluorine rubber, ceramics such as SiC or alumina, a resin such as Teflon or polyamide, or the like is desirably used.

There are several methods for the drive mechanism of the pusher pin 19.cndot.3. One is a method of placing a nonmagnetic actuator in the lower part of the electrostatic chuck. This may include a method of directly linear-driving the pusher pin by an ultrasonic linear motor, and a method of linear-driving the pusher pin by a combination of a rotational ultrasonic motor and a ball screw or rack & pinion gear. In this method, the pusher mechanism can be compactly arranged on a table of an XY stage on which the electrostatic chuck is mounted, the number of wirings of the actuator, limit sensor and the like considerably increases. The wiring extends from the table making XY motions to a sample chamber (main chamber or main housing), but is bent with the motion of the stage, and therefore it should be placed with a large flexure R, and thus takes up a large space. Furthermore, the wiring may become a particle source, and should be replaced periodically, and therefore a necessary minimum number of wirings should be used.

Thus, as a different method, an external drive force is supplied. When the stage moves to a position at which the wafer W is attached/detached, a shaft protruding into a vacuum atmosphere through a bellow is driven by an air cylinder provided outside a chamber to press a shaft of a pusher drive mechanism provided in the lower part of the electrostatic chuck. The shaft is connected to a rack pinion or link mechanism in the pusher drive mechanism, and the reciprocating motion of the shaft is associated with the vertical motion of the pusher pin. When the wafer W is given and taken with the robot hand, the shaft is pushed into the vacuum atmosphere with the air cylinder with the speed adjusted at an appropriate level by a controller, whereby the pusher pin 19.cndot.3 is caused to rise.

Furthermore, the external source for driving the shaft is not limited to the air cylinder, but may be a combination of the servo motor and the rack pinion or ball screw. Furthermore, a rotating shaft can be used as the external drive source. In this case, the rotating shaft operates via a vacuum seal mechanism such as a magnetic fluid seal, and the pusher drive mechanism includes a mechanism converting rotation into a linear motion.

The correction ring 19.cndot.5 has an action of keeping uniform an electric field distribution at end portion of the wafer, and a potential essentially the same as that of the wafer is applied to the correction ring 19.cndot.5. However, to eliminate influences of a very small gap between the wafer and the correction ring and a very small difference in surface height between the wafer and the correction ring, a potential slightly different from that of the end portion of the wafer may be applied. The correction ring has a width of about 10 to 30 mm in the radial direction of the wafer, and a nonmagnetic and conductive material, for example titanium, phosphor bronze, aluminum coated with TiN or TiC may be used for the correction ring.

The conduction needles 19.cndot.4 is supported on a spring 19.cndot.7, and is lightly pressed against the back face of the wafer with a spring force when the wafer is placed on the electrostatic chuck. In this state, electric conduction with the wafer W is established by applying a voltage as described above.

An electrostatic chuck main body is comprised of nonmagnetic plane electrodes 19.cndot.1 and 19.cndot.2 made of tungsten or the like, and a dielectric body formed thereon. For the material of the dielectric body, alumina, aluminum nitride, polyimide or the like may be used. Generally, ceramics such as alumina is a complete isolator having a specific volume resistance of about 10.sup.14 .OMEGA.cm, and therefore causes no charge transfer within the material, and a coulonbic force acts as absorption force. On the other hand, by slightly adjusting a ceramic composition, the specific volume resistance can be reduced to about 10.sup.10 .OMEGA.cm, whereby charge transfer occurs within the material, and thus so called a Johnson-Rahbek force acts stronger than the coulonbic force acts as a wafer absorption force. As the absorption force increases, the applied voltage can be reduced accordingly, a larger margin for insulation destruction can be provided, and a stable absorption force can easily be obtained. Furthermore, by processing the surface of the electrostatic chuck into, for example, a dimple shape, particles may fall to a valley area of the dimple even if particles and the like are deposited on the surface of electrostatic chuck surface, thus making it possible to expect an effect of reducing the possibility that the flatness of the wafer is affected.

From the above, a practical electrostatic chuck is such that aluminum nitride or alumina ceramics adjusted to have a specific volume resistance of about 10.sup.10 .OMEGA.cm is used as a material, irregularities of dimple shape or the like are formed on the surface, and the flatness of the surface formed by a set of the convexes is about 5 .mu.m.

2-1-7-2) Chucking Mechanism for 200/300 Bridge Tool

The apparatus is required to inspect two types of 200 mm wafer and 300 mm wafer without mechanical modification. In this case, the electrostatic chuck should chuck two types of wafer having different sizes, and a correction ring matching the size of the wafer should be placed on the periphery of the wafer. FIGS. 19(A), 19(B) and 20 show a structure therefor.

FIG. 19 shows the wafer W of 300 mm placed on the electrostatic chuck. The correction ring 19.cndot.1 having an inner diameter (gap of about 0.5 mm) slightly larger than the size of the wafer W is positioned in such a manner as to be interlocked with a metallic ring part on the outer edge of the electrostatic chuck. The correction ring 19.cndot.1 are provided with wafer dropping mechanisms 19.cndot.2 at three locations. The wafer dropping mechanism 19.cndot.2 is driven by a vertical drive mechanism associated with the drive mechanism of the pusher pin 19.cndot.3, and is supported rotatably about a rotating shaft provided in the correction ring 19.cndot.1.

When the wafer W is received from the robot hand, the pusher pin drive mechanism operates to push the pusher pin 19.cndot.3 upward. In appropriate timing therewith, the wafer dropping mechanism 19.cndot.2 provided in the correction ring
19.cndot.1 rotates under a drive force as shown in FIG. 19(B). Then, the wafer dropping mechanism 19.cndot.2 forms a taper plane guiding the wafer W to the center of the electrostatic chuck. Then, the wafer W is placed on the pusher pin 19.cndot.3
pushed upward, and thereafter the pusher pin 19.cndot.3 was made to descend. By appropriately adjusting action timing of the drive force for the wafer dropping mechanism 19.cndot.2 together with the descending of the pusher pin 19.cndot.3, the wafer W has its position corrected by the taper plane of the dropping mechanism 19.cndot.2 and placed on the electrostatic chuck so that the center of the wafer W almost matches the center of the electrostatic chuck.

It is desired that a low frictional material such as Teflon, preferably a conductive low frictional material (e.g. conductive Teflon, conductive diamond like carbon, TIB coating) is formed on the taper plane of the dropping mechanism 19.cndot.2. Furthermore, symbols A, B, C, D and E in the figure denote terminals (described later) for applying a voltage, and reference numeral 19.cndot.4 denotes a wafer conducting needle for detecting that the wafer W is placed on the electrostatic chuck, which is pushed upward by a spring 19.cndot.5.

FIG. 20 shows the wafer W of 200 mm placed on the same electrostatic chuck. The surface of the electrostatic chuck is exposed because the diameter of the wafer is smaller than that of the electrostatic chuck, and therefore a correction ring
20.cndot.1 having a size so large that the electrostatic chuck is completely covered. The positioning of the correction ring 20.cndot.1 is performed in the same manner as in the case of the correction ring for the 300 mm wafer.

A step is provided on the inner edge of the correction ring 20.cndot.1, and the correction ring 20.cndot.1 is fitted in a ring groove 20.cndot.2 on the electrostatic chuck side. This is a structure for covering the surface of the electrostatic chuck with a conductor (correction ring 20.cndot.1) so that the surface of the electrostatic chuck is not seen through a gap between the inner edge of the correction ring 20.cndot.1 and the outer edge of the wafer W when the 200 mm wafer is placed. This is because if the surface of the electrostatic chuck is exposed, the surface of the electrostatic chuck is electrically charged to disturb the potential of the sample surface when an electron beam is applied.

Replacement of the correction ring 20.cndot.1 is performed by providing a correction ring replacement space at a predetermined position in a vacuum chamber, and conveying therefrom a correction ring having a necessary size by a robot and attaching the correction ring to the electrostatic chuck (inserting the correction ring into an interlocked part).

The correction ring for the 200 mm wafer is provided with the wafer dropping mechanism 20.cndot.2 as in the case of the correction ring for the 300 mm wafer. A recess is formed on the electrostatic chuck side so as not to interfere with the wafer dropping mechanism 20.cndot.2. The method of placing the wafer on the electrostatic chuck is identical to that for the 300 mm wafer. Furthermore, symbols A, B, C, D and E denote terminals for applying a voltage, reference numeral 20.cndot.3
denotes a push pin similar to the push pin 19.cndot.3, and reference numeral 20.cndot.4 denotes a wafer conducting needle similar to the wafer conducting needle 194.

FIGS. 20-1(A) and 20-1(B) schematically show the configuration of the electrostatic chuck capable of coping with both types of 300 mm wafer and 200 mm, in which FIG. 20-1(A) shows the 300 mm wafer placed on the electrostatic chuck, and FIG.
20-1(B) shows the 200 mm wafer placed on the electrostatic chuck. As apparent from FIG. 20-1(A), the electrostatic chuck has a width large enough to place the 300 mm wafer thereon, and as shown in FIG. 21-2(B), the central area of the electrostatic chuck has a width large enough to place the 200 mm wafer thereon, and a groove 20.cndot.6 in which the inner ridge of the correction ring 20.cndot.1 is to be fitted is provided in such a manner as to surround the wafer. Furthermore, symbols A, B, C, D and E denote terminals for applying a voltage.

In the case of the electrostatic chuck shown in FIGS. 20-1(A) and 20-1(B), whether the wafer is placed on the electrostatic chuck, whether the wafer is correctly placed on the electrostatic chuck, whether the correction ring exists, and so on are optically detected. For example, by placing an optical sensor above the electrostatic chuck, and detecting an optical path length when light emitted from the optical sensor is reflected by the wafer and returned back to the optical sensor, whether the wafer is placed horizontally or slantingly can be detected. Furthermore, existence/nonexistence of the correction ring can be detected by providing a light transmitter slantingly irradiating an appropriate point in a space where the correction ring should be placed, and a light receiver receiving reflected light from the correction ring. Further, by providing a combination of the light transmitter slantingly irradiating the appropriate point in the space where the correction ring for the 200 mm wafer should be placed and the light receiver receiving reflected light from the correction ring, and a combination of the light transmitter slantingly irradiating the appropriate point in the space where the correction ring for the 300 mm wafer should be placed and the light receiver receiving reflected light from the correction ring, and detecting which light receiver receives reflected light, which of the correction ring for the 200 mm wafer and the correction ring for the 300 mm wafer is placed on the electrostatic chuck can be detected.

2-1-7-3) Wafer Chucking Procedure

The wafer chucking mechanism having the structure described above chucks the wafer according to the following procedure.

(1) A correction ring matching the size of the wafer is carried by a robot and placed on the electrostatic chuck.

(2) The wafer is placed on the electrostatic chuck by transportation of the wafer by a robot hand and vertical motions of the pusher pin.

(3) A voltage is applied to the electrostatic chuck in a dipole type (positive and negative voltages are applied to terminals C and D) to adsorb the wafer.

(4) A predetermined voltage is applied to a conducting needle to destruct an insulation film (oxide film) on the back face of the wafer.

(5) A current between terminals A and B is measured to check whether conduction with the wafer is established.

(6) A transition of the electrostatic chuck to a unipole type adsorption is made (terminals A and B are set to GRD, and the same voltage is applied to terminals C and D).

(7) The voltage of the terminal A (, B) is decreased while keeping a difference in potential between the terminal A (, B) and the terminal C (,D), and a predetermined retarding voltage is applied to the wafer.

2-1-8) Apparatus Configuration for 200/300 Bridge Tool

The configuration for achieving an apparatus capable of inspecting the 200 mm wafer and the 300 mm wafer without mechanical modification is shown in FIG. 21 and FIG. 22. Aspects in which the apparatus is different from the apparatus dedicated for the 200 mm wafer or the apparatus dedicated for the 300 mm wafer will be described below.

At an installation site 21.cndot.1 of the wafer cassette that is replaced for specifications of the 200/300 mm wafer, FOUP, SMIF, the open cassette and the like, the wafer cassette appropriate to the wafer size and the type of wafer cassette determined depending on user specifications can be placed. An atmosphere transportation robot 21.cndot.2 has a hand capable of coping with different wafer sizes, i.e. a plurality of wafer dropping portions are provided in conformity with the wafer sizes, and the wafer is placed on the hand at a location matching the wafer size. The atmosphere transportation robot 21.cndot.2 sends the wafer from the installation site 21.cndot.1 to a pre-aligner 21.cndot.3, regulates the orientation of the wafer, then takes the wafer from the pre-aligner 21.cndot.3, and sends the wafer into a load lock chamber 21.cndot.4.

A wafer rack in the load lock chamber 21.cndot.4 has a similar structure, a plurality of dropping portions matching wafer sizes are formed in a wafer support portion of the wafer rack, the height of the robot hand is adjusted so that the wafer placed on the hand of the atmosphere transportation robot 21.cndot.2 is placed in the dropping portion matching the size of the wafer, the wafer is inserted into the wafer rack, and then the robot hand descends to place the wafer in a predetermined dropping portion of the wafer support portion.

The wafer placed on the wafer rack in the load lock chamber 21.cndot.4 is then taken from a load lock chamber 21.cndot.3 by a vacuum transportation robot 21.cndot.6 installed in a transfer chamber 21.cndot.5, and conveyed onto a stage 21.cndot.8
in the sample chamber 21.cndot.7. The hand of the vacuum transportation robot 21.cndot.6 has a plurality of dropping portions matching wafer sizes as in the case of the atmosphere transportation robot 21.cndot.2. The wafer placed in a predetermined dropping portion of the robot hand is placed on the electrostatic chuck having previously mounted a correction ring 21.cndot.9 matching the wafer size in the stage 21.cndot.8, and fixedly adsorbed by the electrostatic chuck. The correction ring
21.cndot.9 is placed on a correction ring rack 21.cndot.10 provided in the transportation chamber 21.cndot.5. Then, the vacuum transportation robot 21.cndot.6 takes the correction ring 21.cndot.9 matching the wafer size from the correction ring rack
21.cndot.10, and conveys the correction ring 21.cndot.9 onto the electrostatic chuck, fits the correction ring 21.cndot.9 in a positioning interlocked part formed on the outer edge of the electrostatic chuck, and then places the wafer on the electrostatic chuck.

When the correction ring is replaced, the opposite operation is carried out. That is, the correction ring 21.cndot.9 is removed from the electrostatic chuck by the robot 21.cndot.6, the correction ring is returned back to the correction ring rack 21.cndot.10 in the transfer chamber 21.cndot.5, and the correction ring matching the size of the wafer to be inspected next is conveyed from the correction ring rack 21.cndot.10 to the electrostatic chuck.

In the inspection apparatus shown in FIG. 21, the pre-aligner 21.cndot.3 is located close to the load lock chamber 22.cndot.4, and th