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United States Patent
6240541
Yasuda , ; et al.
May 29, 2001
Title
Interactive circuit designing apparatus which displays a result of component placement and wire routing from a layout design unit
Abstract
A circuit designing apparatus of an interactive type which enables a simplified and highspeed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
Inventors:
Yasuda; Mitsuru
(Kawasaki,
JP
)
, Sugiyama; Hiroyuki
(Kawasaki,
JP
)
, Ito; Noriyuki
(Kawasaki,
JP
)
, Yamashita; Ryoichi
(Kawasaki,
JP
)
, Konno; Tadashi
(Kawasaki,
JP
)
, Abe; Yasunori
(Kawasaki,
JP
)
, Bizen; Naomi
(Kawasaki,
JP
)
, Maruyama; Terunobu
(Kawasaki,
JP
)
, Kato; Yoshiyuki
(Kawasaki,
JP
)
, Isomura; Tomoyuki
(Kawasaki,
JP
)
, Ikeda; Hiroshi
(Kawasaki,
JP
)
, Takagi; Miki
(Kawasaki,
JP
)
Assignee:
Fujitsu Limited
(Kawasaki,
JP
)
Appl. No.:
227967
Filed:
January 11, 1999
Foreign Application Priority Data
Apr 07, 1995 [JP] 7-082871
Current U.S. Class:
716/6
716/8
716/2
Current International Class:
G06F 17/50 (20060101)
Field of Search:
395/500.07,500.09,500.03,500.08,500.1,500.13,500.12,500.02 716/1,2,6,8,7,11,12
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Primary Examiner:
Teska; Kevin J.
Assistant Examiner:
Siek; Vuthe
Attorney, Agent or Firm:
Armstrong, Westerman, Hattori, McLeland & Naughton
Parent Case Text
This application is a Divisional application of prior application Ser. No. 08/574,901 filed Dec. 19, 1995 now U.S. Pat. No. 5,889,677.
Claims
What is claimed is:
1. A circuit designing apparatus of an interactive type having a display unit for displaying circuit design steps and an input unit for inputting responsive information to displayed data on said display unit and information necessary for a circuit design in order to conduct said circuit design in an interactive form comprising:
a layout design unit for conducting a placement in mounting of each of logic components composing a circuit that is an object of a design on the basis of a result of a logic design and wiring between said logic components;
a display control unit for causing said display unit to display a result of the placement and the wiring conducted by said layout design unit; and
a placing position determining unit for determining a placing position on a boundary of each layout hierarchy block in which a virtual block terminal is placed whenever said layout design unit divides a region that is an object of a design into plural layout hierarchy blocks to conduct a wiring design,
said placing position determining unit determining a center of gravity of coordinates of pins that are logic components linked to a net connected to a virtual block terminal in a layout hierarchy block in which a placing position of said virtual block terminal should be determined, determining a side of said layout hierarchy block which a straight line extending from a position of said center of gravity toward another layout hierarchy block that should be connected to said virtual block terminal crosses, determining a pin of said net closest to said side, and determining a position at which a straight line extending from a position of said pin in a main wiring direction or a sub wiring direction and said side cross as a placing position of said virtual block terminal,
said layout design unit conducting a wiring process between said plural layout hierarchy blocks while placing said virtual block terminal in the placing position determined by said placing position determining unit.
2. A circuit designing apparatus of an interactive type having a display unit for displaying circuit design steps and an input unit for inputting responsive information to displayed data on said display unit and information necessary for a circuit design in order to conduct said circuit design in an interactive form comprising:
a layout design unit for conducting a placement in mounting of each of logic components composing a circuit that is an object of a design on the basis of a result of a logic design and wiring between said logic components;
a display control unit for causing said display unit to display a result of the placement and the wiring conducted by said layout design unit; and
a placing position determining unit for determining a placing position on a boundary of each of layout hierarchy blocks in which a virtual block terminal is placed whenever said layout design unit divides a region that is an object of a design into plural layout hierarchy blocks to conduct a wiring design,
said placing position determining unit determining a center of gravity of coordinates of pins that are logic components linked to a net connected to said virtual block terminal in each of said layout hierarchy blocks connected to one another, connecting centers of gravity determined in respective layout hierarchy blocks with one another with a Steiner tree to estimate wiring paths, and determining positions in each of said estimated wiring path and a boundary of said layout hierarchy block cross as a placing position of a virtual bock terminal of each of said layout hierarchy blocks,
said layout design unit conducting a wiring process among said plural layout hierarchy blocks while placing said virtual block terminals in the respective placing positions determined by said placing position determining unit.
3. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein when said display unit displays a floor plan representing both positions of one or more logic components in the multiple components and routes of one or more wires interconnecting between pins of the one or more components in the predetermined area of the substrate in terms of characteristic points and lines interconnecting the characteristic points, said display control unit is operable:
(i) to select the pins of the one or more components as the characteristic points,
(ii) to decide a first coordinate value of each characteristic point for each coordinate of a coordinate system according to the positions of the one or more components in the predetermined area,
(iii) to sort the characteristic points in ascending or descending order of the first coordinate values of the characteristic points for each coordinate,
(iv) to substitute the first coordinate value of each characteristic point with a second coordinate value proportional to a rank of each characteristic point in the ascending or descending order of the first coordinate values for each coordinate, and
(v) to cause said display unit to display the characteristic points and the lines interconnecting between the characteristic points in the coordinate system using the second coordinate value of each characteristic point for each coordinate.
4. An interactive circuit designing apparatus according to claim 3, wherein said display control unit is operable to select at least one of an end-point and an internally dividing point of the one or more wires also as the characteristic points.
5. An interactive circuit designing apparatus according to claim 3, wherein when the predetermined area has a plurality of layers in which the multiple wires are to be routed, said display control unit is operable to calculate a third coordinate value of each characteristic point for each coordinate by adding a predetermined offset value to the second coordinate value of each characteristic point n times when the last-named characteristic point exists in the n-th layer from a predetermined one of the bottom and the top of the plural layers, and to cause said display unit to display the charate ristic points and the lines interconnecting the characteristic points in the coordinate system using the third coordinate value of each characteristic point for each coordinate.
6. An interactive ircuit designing apparatus according to claim 3, wherein said display control unit is operable to assign an identifier to each characteristic point before substitution of coordinate values, and to cause said display unit to display the characteristic points while designating each characteristic point by the same identifier before and after the substitution of coordinate values.
7. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting between at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect between pins of the multiple components placed bv said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data including both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner;
wherein said layout design unit further includes:
(iii) a wiring route estimating unit for estimating a result of the routing in said routing unit by routing a multiplicity of provisional wires between the pins of the multiple components based on a result of the placement of the multiple components by said placing unit, and
(iv) a congestion degree estimating unit for estimating a congestion degree of the multiple wires of the object circuit for each of local subareas of the predetermined area based on a result of the estimation by said wiring route estimating unit, and
said routing unit is operable to determine a routing order of the multiple wires and a roundabout rate for routing each wire based on the congestion degree estimated for each local subarea by said congestion degree estimating unit, and then to carry out the routing of the multiple wires according to both the routing order and the roundabout rate.
8. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin and a multipilicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit further includes a wiring route estimating unit for estimating a result of the routing in said routing unit by routing a multiplicity of provisional wires between the pins of the multiple components based on a result of the placement of the multiple components by said placing unit,
wherein said routing unit is operable to determine a routing order of the multiple wires and a roundabout rate of the routing based on a result of estimation by said wiring route estimating unit, and then to carry out the routing of the multiple wires according to both the routing order and the roundabout rate, and
wherein said layout design unit further includes a congestion degree estimating unit for estimating a congestion degree of the multiple wires of the object circuit by:
(i) dividing the predetermined area of the substrate into a multiplicity of squares arranged in a checkerboard pattern,
(ii) assigning to each of the multiple squares one or more channels available for the routing of the multiple wires,
(iii) counting the number of channels used for the routing of the multiple provisional wires among the available channels of each square based on a result of the estimation by said wiring route estimating unit,
(iv) estimating the congestion degree for each square by a proportion of the number of the used channels to the number of the available channels for each square, and
(v) ranking the multiple squares according to the congestion degree for each square, and said routing unit is operable to assign to each square a relative priority proportional to a rank of each square according to the congestion degree, and to carry out the routing of the multiple wires in the multiple squares according to the priority assigned for each square.
9. An interactive circuit designing apparatus according to claim 8, wherein when the predetermined area has a plurality of layers in which the multiple wires are to be routed,
said wiring route estimating unit is operable to carry out the estimation of the result of the routing for each of the plural layers,
said congestion degree estimating unit is operable to carry out the estimation of the congestion degree based on a result of the estimation for each layer by said wiring route estimating unit, and
said routing unit is operable to carry out the routing of the multiple wires with giving high priorities to wires using a channel in a square having a high congestion degree based on the congestion degree estimated for each wiring layer by said congestion degree estimating unit.
10. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit further includes a wiring route estimating unit for estimating a result of the routing in said routing unit by routing a multiplicity of provisional wires between the pins of the multiple components based on a result of the placement of the multiple components by said placing unit,
wherein said routing unit is operable to determine a routing order of the multiple wires and a roundabout rate of the routing based on a result of estimation by said wiring route estimating unit, and then to carry out the routing of the multiple wires according to both the routing order and the roundabout rate,
wherein said layout design unit further includes a routability judging unit for judging a routability of the multiple wires with a predetermined roundabout rate based on the estimation by said wiring route estimating unit, and
wherein said routing unit is operable to redetermine a roundable rate with which the multiple wires is assumed to be routable when said routability judging unit has judged unroutable with the predetermined roundabout rate.
11. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routine the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed bv said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein when the predetermined area has a plurality of layers in which the multiple wires are to be routed and each ofthe plural layers has a specific wiring direction in which wires are to be routed, said routing unit is operable to assign different ranges of wire length respectively to layers having a same wiring direction, and to carry out the routing of the multiple wires in the plural layers according to the wiring direction and the ranges of wire lengths.
12. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting between at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect between pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit which data including both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appronriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner;
wherein said routing unit is operable
(i) to calculate a critical degree for each of the multiple wires based on a predetermined delay value of each wire;
(ii) to classify the multiple wires according to the critical degree calculated for each wire,
(iii) to determine a routing order of the multiple wires and a roundable rate for routing of each wire based on the classification of the multiple wires according to the critical degree of each wire, and
(iv) to carry out the routing of the multiple wires according to the routing order and the roundabout rate.
13. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit,
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said routing unit is operable to classify the multiple wires to be routed according to a critical degree to a delay value of each of the multiple wires, to determine a routing order of the multiple wires and a roundable rate for each wire, and to carry out the routing of the multiple wires according to the routing order and the roundabout rate, and
wherein said layout design unit is operable to set a wiring tolerable degree of one wire according to the critical degree for another wire which is to be routed adjacent to the one wire prior to the routing of the one wire, and to carry out the routing of the one wire according to the wiring tolerable degree after the routing of the one wire.
14. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting between at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data including both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner;
wherein said layout design unit further includes a placement check unit for checking whether there is any error component, which causes a placement error, among the multiple components based on a result of the placement of the multiple components by said placement unit, and
when one or more error components are found during the checking by said placement check unit, said display control unit is operable to control said display unit such that said display unit displays both a list of the error components and a placement map of the object circuit, which placement map represents the placement result of the multiple components by said placement unit, and to highlight one or more parts of the placement map displayed on said displayed unit, said parts corresponding to the one or more error components.
15. An interactive circuit designing apparatus according to claim 14, wherein when said input unit inputs an instruction to select one of the error components included in the list, said display control unit is operable to highlight the selected error component on said placement map.
16. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a disolay control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit further includes a congestion degree computing unit for dividing the predetermined area into a plurality of local subareas and computing a congestion degree of the multiple wires in each of the plural local subareas of the predetermined area based on the result of routing of the multiple wires by said routing unit, and
when said input inputs an instruction to re-route a selected one of the multiple wires while adding a specified length to a current wire length of the selected wire after the routing of the multiple wires by said routing unit, said routing until is operable to select a local subarea across which the selected wire is routed and which has a low congestion degree among the plural local subareas based on a result of the computation by said congestion degree computing unit, and to automatically carry out the re-routing of the selected wire while adding the specified length within the selected subarea.
17. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting between at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit which data including both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner;
wherein after the routing of the multiple wires is carried out by said routing unit and when said input unit inputs data selecting one of the multiple wires which is to be re-routed, data specifying a length which is to be added to a current wire length of the selected wire, and data specifying a local subarea of the predetermined area within which area the selected wire is to be re-routed, said routing unit is operable to automatically carry out the re-routing of the selected wire within the selected subarea while adding the specified length to the current wire length of the selected wire.
18. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting between at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit which data including both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various information necessary for circuit designing in response to the current data displayed be said display unit, thereby allowing circuit designing to be carried out in an interactive manner;
wherein when said input unit inputs an instruction to replace a selected one ofthe multiple components in a specified position on the predetermined area after the placement of the selected component by said placing unit and the routing of one or more wires associated with the selected component are carried out, said associated wires interconnecting between the selected component and one or more other components by said routing unit,
said placing unit is operable to replace the selected component in the specified position according to the instruction, and
said routing unit is operable to automatically re-route the associated wires in accordance with the specified position in which the selected component is replaced by said placing unit.
19. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetennined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting between at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data including both a result of placement by said placing unit and a result of routing by said routing unit;
(II) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner;
wherein said display unit is operable to display a plurality of placement maps each representing a part of the placement result of the multiple components by said placement unit, and
when one or more components included in a selected one of the plural placement maps are replaced by said placing units, or one or more wires included in the selected map are re-routed by said routing unit, in response to an external instruction through said input unit, said display control unit is operable to automatically renew both the selected map and any other one or more maps each including the one or more components, or the one or more wires, according to the replacement by said placing unit, or the re-routing by said routing unit.
20. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design ofthe object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit is operable to divide the predetermined area into a plurality of layout hierarchy blocks in which the multiple components are to be disposed in a predetermined distribution and further includes a placing region setting unit for setting a placing region, within which a block terminal is to be placed, on a boundary of each layout hierarchy block according to an instruction through said input unit, where the block terminal is a logical component which is to be placed in one layout hierarchy block and connected to a logical component which is to be placed in another layout hierarchy block adjacent to the one layout hierarchy block, and
wherein said routing unit is operable to carry out the routing with placing the block terminal inside the placing region set for each layout hierarchy block by said placing region setting unit.
21. An interactive circuit designing apparatus according to claim 19, wherein
said layout design unit further includes a grouping unit for grouping a plurality of block terminals and registering the plural terminals as a terminal group according to an instruction through said input unit for each layout hierarchy block, and
said placing region setting unit is operable to set the placing region for each group registered by said grouping unit according to an instruction through said input unit.
22. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design ofthe object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit is operable to divide the predetermined area into a plurality of layout hierarchy blocks in which the multiple components are to be disposed in a predetermined distribution and further includes a forbidden region setting unit for setting a forbidden region, within which a block terminal is not to be placed, on a boundary of each layout hierarchy block according to an instruction through said input unit, where the block terminal is a logical component which is to be placed in one layout hierarch block and connected to a logical component which is to be placed in another layout hierarchy block adjacent to the one layout hierarchy block, and
wherein said routing unit is operable to carry out the routing with placing the block terminal outside the forbidden region set for each layout hierarchy bock by said forbidden region setting unit.
23. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components, said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the obiect circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routing the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit further includes a placeable position determining unit responsive to an instruction through said input unit, said placeable position determining unit being operable, when the multiple components of the object circuit include both an input/output circuit, which is to be placed in a predetermined position on a substrate, and one or more input/output terminals, which are to be placed on a surface of the substrate and to be interconnected with one or more pins of the input/output circuit, to determine a placeable position, in which the one or more input/output terminals are to be placed, based on the predetermined position in which the input/output circuit is to be placed in such a manner as to diminish distances between the one or more input/output terminals and a respective one of the one or more pins of the input/output circuit, and
wherein said routing unit is operable to carry out the routing of a wire between the each of the one or more input/output terminals and the respective one of the one or more pin of the input/output circuit based on the placeable position of the one or more input/output terminals determined by said placeable position determining unit.
24. An interactive circuit designing apparatus for designing an integrated circuit which includes a multiplicity of logic components placed in a predetermined area on a substrate, each component having at least one pin, and a multiplicity of wires routed in the predetermined area on the substrate, each wire interconnecting at least two pins of the multiple components, in an interactive manner based on a logic design of the object integrated circuit to be designed, which logic design defines both the required multiple components of the object circuit and the interconnection relationship between the multiple components said apparatus comprising:
(I) a layout design unit for carrying out layout designing of the object circuit based on the logic design of the object circuit, said layout design unit including:
(i) a placing unit for placing the multiple components in the predetermined area on the substrate based on the logic design of the object circuit, and
(ii) a routing unit for routine the multiple wires to interconnect pins of the multiple components placed by said placing unit based on the logic design of the object circuit;
(II) a display unit for displaying various data concerning the layout designing by said layout design unit, which data includes both a result of placement by said placing unit and a result of routing by said routing unit;
(III) a display control unit, responsive to said layout design unit, for controlling said display unit such that said display unit displays data appropriate to a current stage of the layout designing by said layout design unit; and
(IV) an input unit for inputting to said layout design unit various items of information necessary for circuit designing in response to the current data displayed by said display unit, thereby allowing circuit designing to be carried out in an interactive manner,
said layout design unit being cooperatively connected with both said display control unit and said input unit in a manner so as to facilitate both the inputting operation of said input unit and the display controlling operation of said display control unit, thereby causing improved efficiency of interactive operations in circuit designing,
wherein said layout design unit further includes a limited region setting unit responsive to an instruction through said input unit, said limited region setting unit being operable, when the multiple components of the object circuit include an input/output circuit and one or more input/output terminals, which are to be placed in predetermined positions on a surface of the substrate and to be interconnected with one or more pins of the input/output circuit, to set a limited region, within which the input/output circuit is to be placed, based on the predetermined positions in which the one or more input/output terminals are to be placed in such a manner that each of distances between the one or more input/output terminals and a respective one of the one or more pins of the input/output circuit is below a predetermined value, and
wherein said placing unit is operable to place the input/output circuit inside the limited region set by said limited region setting unit.
Description
BACKGROUND OF THE INVENTION
1) Field of the Invention
The present invention relates to a circuit designing apparatus of an interactive type which conducts a circuit design of an integrated circuit such as an LSI or a printed circuit board in an interactive form while displaying steps of the circuit design on a display unit such as a display or the like.
2) Description of the Related Art
In general, a logic design, a layout design (a mounting design) or a speed analysis are conducted when a circuit such as an LSI, a printed board, etc. is designed.
More specifically, a logic design for realizing functions demanded by a circuit that is an object of the design is first conducted. A layout design for determining a placement in mounting (physical) of cells (sometimes called elements or gates) such as flip-flops as logic components or wiring between the cells is then conducted on the basis of a result of the logic design.
After the layout design, a speed analysis on the basis of a delay computation is conducted for each path obtained as a result of the design to feed-back a magnitude of a delay obtained as a result of the analysis. The logic design and the layout design are again performed in order to improve a delay of each path. The above logic design, layout design and speed analysis are repeated by trial-and-error until each path has an optimum delay in a try-and-error fashion.
A system (a software) for conducting a logic design, a layout design and a speed analysis in each step has been existing as an interactive logic design system, an interactive layout design system and an interactive speed analysis system, which are not in a system structure suitable for conducting processes in linkage. For this, a circuit design is conducted in a series of processes accompanied by feed-back in the known technique.
In the general circuit designing technique set forth above, the logic design, the layout design and the speed analysis are not linked to each other since they are conducted separately by different systems (softwares). It is thus necessary to repeat each process sequentially, which causes a longer turnaround time and prevents a high-speed design and development of a circuit such as an LSI, a printed circuit board, etc.
There has been proposed a circuit designing apparatus of an interactive type in which a logic design system, a layout design system and a speed analysis system are connected so as to be able to link with each other on occasion.
However, even the circuit designing system of an interactive type in which each of the above systems exist separately or the circuit designing system of an interactive type in which the above systems are connected so as to be associated with each other results in the following various problems.
(1) Recently, integrated circuits, such as LSI circuits have become more microscopic more and more. With this, a problem of a wiring capacitance becomes significant such that a waveform of a signal transferred in a wiring path on a circuit is apt to become rounded.
A binary signal transferred in a circuit rises or falls from one level to another within an extremely short time of about zero in theory. However, if a wiring capacitance increases as stated above, a slew rate of a rise or a fall from one level to another level increases. This slew rate is a measure of a degree of "rounding" in a signal waveform. If rounding occurs, a time (Tsin) required to reach from one level to another level increases, thus a time required to reach a threshold value used to judge as to whether the binary signal is in either one of two levels, as a matter of fact. If a delay value in the event that a signal having such rounding passes through a logic component (referred as a gate, cell or element on occasion) is determined uniformly upon speed analysis as before, a difference between a calculated delay value and an actual delay value becomes extremely large, which prevents an accurate delay computation.
(2) A delay computation by speed analysis is conducted after placement of logic components or after wiring between placed components, in general. There has been no case where the delay computation is conducted in a stage after a logic design. As a circuit that is an object of a design becomes more microscopic and highly integrated, there is a demand to obtain a result of a delay computation in an early stage, that is, a final stage of a logic design so as to take it into account in the design.
(3) In a wiring design of an integrated circuit such as an LSI or the like, data transfer between flip-flops (FFs) that are logic components should meet various timing restrictions (overdelay, racing). It is impossible for the designer to pay attention to wiring paths of all combinations of flip-flops of the number extending, in general, to hundreds of thousands to make a check as to whether a result of the wiring design meets the timing restrictions in any of the above circuit designing apparatus of an interactive type.
(4) If a condition of wiring connections of a circuit that is an object of the design is displayed on a display unit such as a display in a wiring design of an integrated circuit such as an LSI or the like, each of characteristic points for the wiring (vias, pins of logic components, or the like) is displayed in a displaying position proportional to actual coordinate values of the characteristic point. In this case, if there is a large difference in density of existing characteristic points locally, it is difficult to discriminate a detailed part having a high density on the display unit if the whole of the circuit is displayed. If the detailed part is enlarged and displayed, it is difficult to grasp the whole image of the circuit that is the object of the design.
(5) If wiring between logic components is performed after each of the logic components has been placed in a layout design, a part in which a wiring is extremely congested or a part in which a tight restriction to a delay value (a high critical degree) set in advance is imposed on a wiring may occur depending on a condition of placement of the logic components. An actual wiring devoid of a consideration on such parts causes a lot of unroutable parts and degradation of wiring efficiency.
(6) Cell that is a logic component placed on an integrated circuit such as an LSI or the like has been in the same shape and the same size. Once a placing position for a cell is determined, there has occurred no placement error such as cell overlapping or the like. However, there is a case where cells having different sizes are placed on the same circuit with a change in the LSI technology, a placement error such that cells overlap to each other may occur. In the present condition, there is no way for the designer to immediately know such placement error. For this, there is a demand for a development of a technique helpful for the designer to clearly know a condition of occurrence of a placement error.
(7) If a part that has been already wired is re-wired, the designer designates two points that should be re-wired on a wiring path that has been wired, and conducts a re-wiring in a designated wiring length, which imposes a great burden on the designer. In consequence, there is a demand for a simplified, automated re-wiring process.
(8) In the case of replacing a cell that has been placed, a re-wiring of the cell after the replacement cannot be executed unless the designer gives an instruction to re-wire separately even if a net that should be linked to the cell has been wired, which imposes a great burden on the designer. There is therefore a demand for a simplified, automated replacing process.
(9) While plural placement maps of a common circuit are displayed on the display unit, the designer refers to one of these maps and conducts a placing process or a wiring process on the map. However, a result of the process does not reflect on other maps. As a result, there occurs a case where a result of an alteration in design differs from a condition of the design displayed on the placement map, which may cause a confusion of the designer who works out a design in an interactive form by referring the display unit.
(10) With an increase of the number of elements mounted on an integrated circuit such as an LSI or the like, a technique for dividing an inside of the chip into plural hierarchical layout blocks (LSG: Layout SubGroup) to conduct a mounting becomes the main current. At this time, a net connecting divided blocks exists, in general. Therefore, in a hierarchical layout design, an input/output terminal (a virtual block terminal; referred as a temporary terminal, hereinafter) is temporarily provided to each block, the temporary terminal is placed at the time of placement of the inside of each block, an element and the temporary terminal are connected inside the block, and the temporary terminals of respective blocks are wired and connected to connect the blocks.
Upon the hierarchical layout design as above, it is necessary that a temporary terminal is manually placed by the designer in a place that the designer thinks appropriate in consideration of a connection of the temporary terminal and an element in the block or a connection of the temporary terminal and another block. A recent layout design system employs a technique for automatically placing all blocks in consideration on a relation of placement of individual blocks in the entire circuit. However, a manual work including a shift of each temporary terminal is indispensable in order to conduct a placement respecting an intention of the designer. Since this process is conducted in consideration of only placement of blocks, no attention is paid regarding placement of elements inside the block or wiring between the elements.
(11) An input/output terminal of an integrated circuit such as an LSI or the like is placed in a peripheral area of the chip. There has been no freedom to alter its coordinates in a mounting design. To the contrary, by employing a technique for arranging spherical terminals called bumps on the chip surface, it is possible to determine a position of the input/output terminal on the chip, which increases a degree of freedom in placement. With this, it becomes possible to place an input/output circuit that should be connected to the input/output terminal within a region in which a general element is placed close to a position of the input/output terminal.
An increase of a degree of freedom to place the input/output terminal and the input/output circuit sometimes causes a limitation of in wiring length between the input/output terminal and the input/output circuit. In the case of the hierarchical layout design stated above, there is a possibility that the input/output terminal and the input/output circuit belong different layout hierarchical blocks. In such a case, there is no way to examine when an inside of each block is being designed as to whether the wiring length between the input/output terminal and the input/output circuit is below the limit value. Or, there is a possibility that a region in which the input/output circuit should be placed is not definite since a placing position of the input/output terminal is not definite.
SUMMARY OF THE INVENTION
In the light of the various problems described above, an object of the present invention is to provide a circuit designing apparatus of an interactive type which can accomplish a high-speed and accurate delay computation, a timing check on all wiring paths, a simultaneous and clear display of not only a detailed part but also a whole of a circuit that is an object of the design seizable by the designer, an improvement of wiring efficiency, a clear representation of a condition of occurrence of a placement error, simplification and automation of a replacing process or a re-wiring process, a multi-window display without causing a confusion, etc. so as to simplify and speed up a circuit design of an integrated circuit such as an LSI or a printed circuit board while largely reducing a burden on the designer.
According to a first embodiment, a circuit designing apparatus of an interactive type includes a display unit for displaying steps of a circuit design and an input unit for inputting information responsive to display data on the display unit or information necessary for a circuit design in order to conduct the circuit design in an interactive form. This circuit designing apparatus of an interactive type further includes a speed analyzing unit for conducting a delay computation for each wiring path on a circuit that is an object of the design, and a display control unit for displaying a result of the delay computation by the speed analysing unit on the display unit, wherein upon a delay computation by the speed analyzing unit, a delay value of each logic component forming the circuit that is the object of the design is set and altered according to a rounding of a signal waveform inputted to the logic component.
According to a second embodiment, a circuit designing apparatus of an interactive type includes a display unit and an input unit similar to those described above. This circuit designing apparatus of an interactive type further includes a logic design unit for conducting a logic design of a circuit to be designed, a layout design unit for conducting a placement in mounting of each of logic components forming the circuit to be designed on the basis of a result of the logic design by the logic design unit, then wiring between the logic components, a speed analyzing unit for conducting a delay computation for each wiring path on the circuit that is the object of the design, and a display control unit for causing the display unit to display a result of a logic design by the logic design unit, a result of a placement/wiring by the layout design unit and a result of the delay computation by the speed analyzing unit, wherein the above logic design unit, layout design unit and speed analyzing unit are connected so as to be associated with each other on occasion, and the speed analyzing unit estimates and calculates a delay value of a wiring path of the circuit that is the object of the design while estimating a delay value between the logic components on the basis of an empirical delay value set in advance before the layout design unit performs a placement in mounting of each of the logic components after the logic design by the logic design unit.
In the second embodiment, it is possible that before a wiring between the logic components after the placement in mounting of each of the logic components by the layout design unit, the speed analyzing unit estimates and calculates a delay value of a wiring path of the circuit to be designed on the basis of the shortest route between pins that should be connected to each other. It is also alternatively possible that the speed analyzing unit calculates a delay value of a wiring path of the circuit to be designed on the basis of a result of an actual wiring by the layout design unit.
In the second embodiment, a delay value for each logic component may be set and altered according to dullness of a signal waveform inputted to a logic component when the speed analyzing unit conducts a delay computation.
In the first and second embodiments, rounding if of a signal waveform is added in the delay computation as above, the circuit designing apparatus of an interactive type further includes a path trace unit for tracing a wiring path connected to a predetermined pin designated according to an instruction through the input unit from that pin, wherein the speed analyzing unit calculates a degree of rounding of a signal waveform varying, along the wiring path and sets a delay value of a logic component on that wiring path according to the dullness to conduct a delay computation of that wiring path concurrently with a tracing process of the wiring path by the path trace unit.
At this time, the circuit designing apparatus of an interactive type according to the first and second embodiments further includes a timing check unit for checking a timing of supply of a clock signal to each of the logic components, wherein if a clock system supplying a clock signal to each of the logic components has been already designed, the timing check unit designates a clock pin of the clock system on which the check should be made and an initial value and a phase of the clock signal inputted from the clock pin through the input unit, the path trace unit traces a wiring path from that clock pin to search all logic components connected to that clock pin, the speed analyzing unit, at the same time, conducts a delay computation of all wiring paths between that clock pin and respective logic components connected to that clock pin and stores a result of the delay computation as a clock path delay values, and a flag showing that a logic component searched by the path trace unit is an object of a check by the timing check unit is set to each pin of the logic component. After that, the path trace unit conducts a tracing process of a wiring path from a clock input pin of each of all the searched logic components, and activates the timing check unit when the path trace unit traces a pin to which the flag is set in the tracing process. The timing check unit conducts a clock timing check on a logic component to which that pin belongs on the basis of the delay value up to the pin calculated by the speed analyzing unit, the clock path delay value, and an initial value and a phase of a clock signal designated through the input unit.
The circuit designing apparatus of an interactive type according to the first and second inventions may include a delay value setting unit for setting a predetermined delay value to an arbitrary pin traced by the path trace unit according to an instruction through the input unit, wherein the speed analyzing unit adds a predetermined value set by the delay value setting unit as a delay value of a wiring path passing through that pin.
On the other hand, the circuit designing apparatus of an interactive type according to the first and second embodiment may include a timing check unit similar to the above, and a search unit for searching all logic components forming a circuit that is an object to embodiment, each of which having a clock input pin connected to a clock system if the clock system supplying a clock signal to each of the logic components is not yet designed, wherein a flag showing that a logic component searched by the search unit is an object of a check by the timing check unit is set to each pin of the logic component. After that, the path trace unit conducts a tracing process on a wiring path from a clock input pin of each of all the logic components searched by the search unit. If the path trace unit traces a pin to which a flag is set in the tracing process, the path trace unit activates the timing check unit. The timing check unit conducts a clock timing check on a logic component to which that pin belongs on the basis of a delay value up to that pin calculated by the speed analyzing unit.
The circuit designing apparatus of an interactive type according to the first and second embodiments may include a counter for counting the number of times that pin is traced by the path trace unit, wherein the display control unit causes the display unit to display information in terms of a magnitude of frequency of passage of signals through each pin on the basis of a count value of each pin counted by the above counter.
The circuit designing apparatus of an interactive type according to the first and second embodiments may include a region setting unit for setting an executing region in which the path trace unit conducts a tracing process on a wiring path and the speed analyzing unit conducts a delay computing process in response to an instruction through the input unit, wherein the display control unit causes the display unit to display only a result of the process in said executing region set by the region setting unit.
The circuit designing apparatus of an interactive type according to the first and second embodiments may include a trace control unit for switching and controlling an operation of the path trace unit such that the path trace unit conducts a forward trace from a trace start pin if only the trace start pin is designated according to an instruction through the input unit, conducts a backward trace from a trace destination pin if only the trace destination pin is designated according to an instruction through the input unit, and conducts a trace between two points if these two points, that is, a trace start pin and a trace destination pin, are designated according to an instruction through the input unit. In this case, a mode as to whether the speed analyzing unit executes a delay computation after a backward trace when the trace control unit causes the path trace unit to execute a backward trace.
The display control unit may cause the display unit to display a result of a tracing by the path trace unit and a result of a delay computation by the speed analyzing unit as a list of trace destination pins. The display control unit may have a sorting function to sort a display condition of the list according to pin names of the trace destination pins or delay values of the trace destination pins.
In this case, the display control unit causes the display unit to hierarchically display the above list. When information of an upper hierarchy on the display unit is selected according to an instruction through the input unit, the display control unit causes the display unit to display information of a lower hierarchy corresponding to the information of the upper hierarchy selected. In addition, the circuit designing apparatus according to the first and second inventions may include an external file writing unit for writing the list of the trace destination pins displayed on the display unit by the display control unit into an external file.
The display control unit may cause the display unit to display a result of a tracing by the path trace unit as a schematic destination route diagram, in addition, a result of a delay computation by the speed analyzing unit corresponding to the result of the tracing as a graph showing a delay value and an accumulated delay value at a point corresponding to a position in the schematic destination route diagram.
In this case, the display control unit causes the display unit to simultaneously display the schematic destination route diagrams and the graphs of plural wiring paths. The circuit designing apparatus of an interactive type according to the first and second inventions may further include a printing unit for printing out the schematic destination route diagram or the graph displayed on the display unit by the display control unit, or an external file writing unit for writing the schematic destination route diagram or the graph displayed on the display unit by the display control unit into an external file. Further, the display control unit may cause the display unit to display an actual circuit diagram corresponding to the schematic destination route diagram according to an instruction through the input unit. Still further, the display control unit may cause the display unit to display all wiring paths each from a trace start pin to a trace destination pin traced by the path trace unit with a pin name of a pin of each logic component in the form of a tree structure, and if an arbitrary pin is selected on the display of the wiring paths in the form of a tree structure displayed on the display unit according to an instruction through the input unit, the display control unit may cause the display unit to display detailed information including a delay value of the selected pin.
A circuit designing apparatus of an interactive type according to a third embodiment includes a display unit and an input unit similar to those described above. The circuit designing apparatus of an interactive type according to the third embodiment further includes a display control unit for causing the display unit to display a wiring connection condition between characteristic points including a pin of each logic component forming a circuit that is an object of a design. The display control unit sorts coordinates of the characteristic points in the order their ascending or descending for each coordinate axis, substitutes them with coordinate values proportional to that order, and causes the display unit to display the characteristic points.
In this case, points at both ends of a wire connecting pins of the logic components and internal dividing points on the wire are taken out as the characteristic points. If the wiring connection condition displayed on the display unit extends over plural layers, the display control unit may add an offset proportional to the order of a layer on which the characteristic point exists to the substituted coordinate values to cause the display unit to display the characteristic points. Further, it is possible to set an identifier common to before and after the substitution of the coordinates to each characteristic point.
A circuit designing apparatus of an interactive type according to a fourth invention includes a display unit and an input unit similar to those described above. The circuit designing apparatus of an interactive type according to the fourth invention further includes a layout design unit for conducting a placement in mounting of each logic component forming a circuit that is an object of a design on the basis of a result of a logic design, then wiring the logic components, a display control unit for causing the display unit to display a result of a placement/wiring by the layout design unit, and a wiring route estimating unit for virtually wiring between the logic components in a stage where the layout design unit determines a placement in mounting of each of the logic components to estimate a wiring path, wherein the layout design unit determines an order of wiring and a rate of roundabout on the basis of a result of the estimation by the wiring route estimating unit, then conducts an actual wiring between the logic components according to the determined order of wiring and rate of roundabout.
In this case, the circuit designing apparatus of an interactive type according to the fourth invention further includes a congestion degree computing unit for dividing the circuit that is the object of the design into plural grid-like regions, computing a degree of congestion of wiring paths on the circuit that is the object of the design as a rate of the estimated number of used channels on the basis of a result of the estimation by the wiring route estimating unit to the number of usable channel in each grid to rank each grid on the basis of a magnitude of the degree of congestion, wherein the layout designing unit preferentially conducts an actual wiring in a region having a high degree of congestion on the basis of information of the ranking by the congestion degree computing unit.
The circuit designing apparatus of an interactive type according to the fourth invention may include a routability judging unit for judging a routability (possibility of wiring) at a rate of roundabout set in advance on the basis of a result of the estimation by the wiring route estimating unit, wherein if the routability judging unit judges unroutable, the layout design unit determines a routable rate of roundabout.
It is possible that if a wiring by the layout design unit extends over plural layers, the wiring route estimating unit estimates wiring routes on each wiring layer, the congestion degree computing unit computes the degree of congestion on the basis of a result of the estimation for each wiring layer by the wiring route estimating unit, and the layout design unit preferentially conducts an actual wiring of a net having a high degree of necessity of using a channel which is estimated to be in a high degree of congestion on the basis of a magnitude of the degree of congestion of each wiring layer computed by the congestion degree computing unit.
A circuit designing apparatus of an interactive type according to a fifth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above, wherein if a wiring by the layout design unit extends over plural layers and plural wiring layers having the same main wiring direction exist, wiring lengths different from wiring layer from wiring layer having the same main wiring direction are set in advance, and the layout designing unit conducts an actual wiring on a wiring layer selected among the wiring layers according to a wiring direction and a wiring length.
A circuit designing apparatus of an interactive type according to a sixth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above, wherein the layout design unit classifies nets that are objects of a design according to a critical degree to delay, sets a wiring order and a rate of roundabout to each classified nets that are the objects of the wiring, and conducts an actual wiring between logic components according to the wiring order and the rate of roundabout.
In this case, the layout design unit sets a wiring tolerable degree of another net, which will be wired after, in adjacent to a net that is an object of the wiring, then actually wires another net according to the wiring tolerable degree after the actual wiring of the net that is the object of the wiring.
A circuit designing apparatus of an interactive type according to a seventh invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the seventh invention further includes a placement check unit for checking as to whether a logic component causing a placement error after placement of each of the logic components by the layout design unit exists or not. If the placement check unit judges that a logic component causing a placement error exists, the display control unit causes the display unit to display a list of logic components causing placement errors, and emphatically display the logic components causing the placement errors on a placement map of a circuit that is an object of the design. In this case, the display control unit may make a logic component selected in the list of the logic components according to an instruction through the input unit be emphatically displayed on the placement map.
A circuit designing apparatus of an interactive type according to an eighth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the eighth invention further includes a congestion degree computing unit for computing a degree of congestion of wiring on a circuit that is an object of a design on the basis of a result of an actual wiring executed by the layout design unit, wherein if an instruction to conduct a re-wiring adding a designated wiring length of a net that has been already wired is inputted through the input unit, the layout design unit selects a region having a low degree of congestion on the basis of a result of the computation by the congestion degree computing unit, and automatically conducts a designated length wiring adding the designated wiring length of the net that has been already wired in the selected region.
A circuit designing apparatus of an interactive type according to a ninth invention includes a display unit, an input unit, a layout unit and a display control unit similar to those described above, wherein if an instruction to conduct a re-wiring adding a designated wiring length of a net that has been already wired within a predetermined region including that net is inputted through the input unit, the layout design unit automatically conducts a designated length wiring adding the designated wiring length of the net that has been already wired in the predetermined region within the predetermined region.
A circuit designing apparatus of an interactive type according to a tenth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above, wherein when an instruction to alter a placing position of a logic component that has been already placed is inputted through an input unit, the layout design unit automatically re-wires between the logic components after alteration of a placing position of that logic component (after re-placement) and a net if the net that should be linked to that logic component has been already wired.
A circuit designing apparatus of an interactive type according to an eleventh invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above, wherein if the layout design unit conducts a placing process or a wiring process on at least one placement map among plural placement maps of a circuit that is an object of a design according to an instruction through the input unit while the display control unit causes the display unit to display the plural placement maps of the circuit that is the object of the design, the display control unit causes a result of the process to be displayed even on another placement map showing a part that is an object of the process in association.
A circuit designing apparatus of an interactive type according to a twelfth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the twelfth invention further includes a placing region setting unit for setting a placing region in which a virtual (temporary) block terminal should be placed on a boundary of each layout hierarchy block according to an instruction through the input unit if the layout design unit divides a region that is an object of a design into plural layout hierarchy blocks to conduct a wiring design, wherein the layout design unit conducts a wiring process while placing the virtual block terminal within the placing region set by the placing region setting unit.
In this case, the circuit designing apparatus of an interactive type according to the twelfth invention may include a grouping unit for entering plural virtual block terminals as one group according to an instruction through the input unit, wherein the placing region setting unit sets the placing region for each group entered by the grouping unit according to an instruction through the input unit.
A circuit designing apparatus of an interactive type according to a thirteenth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the thirteenth invention further includes a placement forbidden region setting unit for setting a forbidden region in which a virtual (temporary) block terminal is forbidden to be placed on a boundary of each layout hierarchy block according to an instruction through the input unit when the layout design unit divides a region that is an object of a design into plural layout hierarchy blocks to conduct a wiring design, wherein the layout design unit conducts a wiring process while placing the virtual block terminal in a region excepting the forbidden region set by the placement forbidden region setting unit.
A circuit designing apparatus of an interactive type according to a fourteenth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the fourteenth invention further includes a placing position determining unit for determining a placing position on a boundary of each layout hierarchy block in which a virtual (temporary) block terminal should be placed when the layout design unit divides a region that is an object of a design into plural layout hierarchy blocks, wherein the placing position determining unit determines a center of gravity of coordinates of pins that are logic components linked to a net connected to a virtual block terminal in a layout hierarchy block in which a placing position of the virtual block terminal should be determined, determines a side of the layout hierarchy block over which a straight line extending from a position of the center of gravity toward a direction of another layout hierarchy block connected to the virtual block terminal crosses, determines a pin of the net closest to the side, and determines a position in which a straight line extending from a position of the pin in a main wiring direction or a sub wiring direction and the side cross as a placing position of the virtual block terminal, and the layout design unit conducts a wiring process between the plural layout hierarchy blocks while placing the virtual block terminal in the placing position determined by the placing position determining unit.
A circuit designing apparatus of an interactive type according to a fifteenth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the fifteenth invention further includes a placing position determining unit for determining a placing position on a boundary of each layout hierarchy block in which a virtual (temporary) block terminal should be placed when the layout design unit divides a region that is an object of a design into plural layout hierarchy blocks to conduct a wiring design, wherein the placing position determining unit determines a center of gravity of coordinates of pins that are logic components linked to a net connected to a virtual block terminal in each of the layout hierarchical blocks connected to each other, connecting the centers of gravity determined in respective layout hierarchy blocks with a Steiner tree to estimate a wiring route, and determines a position in which the estimated wiring path crosses a boundary of each the layout hierarchy block as a placing position of the virtual block terminal of each of the layout hierarchy blocks, and the layout design unit conducts a wiring process among the plural layout hierarchy blocks while placing the virtual block terminals in the placing positions determined by the placing position determining unit.
A circuit designing apparatus of an interactive type according to a sixteenth invention includes a display unit, an input unit, a layout unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the sixteenth invention further includes a placeable position determining unit for determining an input/output terminal placeable position closest to a position of a pin of an input/output circuit if a circuit that is an object of a design is a circuit having an input/output terminal on a chip surface and a placing position of the input/output circuit as a logic component that should be wired and connected to the input/output terminal on the circuit that is the object of the design has been already determined, wherein the layout design unit conducts a wiring process between the input/output terminal placeable position determined by the placeable position determining unit and the pin of the input/output circuit.
A circuit designing apparatus of an interactive type according to a seventeenth invention includes a display unit, an input unit, a layout design unit and a display control unit similar to those described above. The circuit designing apparatus of an interactive type according to the seventeenth invention further includes a limited region setting unit for setting a limited region in which a placing position of an input/output circuit is limited according to an instruction through the input unit if the circuit that is the object of the design is a circuit having an input/output terminal on a chip surface and a placing position of the input/output terminal on the circuit that is the object of the design has been already determined such that a distance between an input/output terminal and a pin of an input/output circuit as a logic components that should be connected to that input/output terminal is below a predetermined value, wherein the layout design unit places the input/output circuit within a limited area set by the restricted region setting unit and conducts a wiring process between the pin of the input/output circuit and the input/output terminal.
In the circuit designing apparatus of an interactive type according to the first invention, a delay value of each logic component forming a circuit that is an object of a design is set and altered according to dullness of a signal waveform inputted to the logic components, whereby the speed analyzing unit may perform a delay computation while taking dullness of a signal waveform into consideration.
In circuit designing apparatus of an interactive type according to the second invention, when the logic design unit, the layout design unit and the speed analyzing unit conduct respective processes, it is possible to shift the process to another process on occasion. In addition, before a placement in mounting after a logic design, the speed analyzing unit may estimate and calculate a delay value of a wiring path of a circuit that is an object of a design so as to take a result of the delay computation into account in an early stage of the circuit design.
The speed analyzing unit may estimate a delay value on the basis of the shortest route between pins that should be connected to each other before a wiring is conducted after a placement in mounting. After an actual wiring, a delay value is calculated on the basis of a result the actual wiring, and a result of the delay computation can be reflected in a placement design or a wiring design.
According to the second invention, a delay value of each logic component forming a circuit that is an object of a design is set and altered according to a dullness of a signal waveform inputted to that logic component so that the speed analyzing unit can conduct a delay computation while taking the dullness of the signal waveform into consideration.
Concurrently with a tracing process of a wiring path by the path trace unit, the speed analyzing unit can conduct a delay computation along the wiring path while taking a change in the dullness of the signal waveform into consideration.
At this time, if a clock system has been already designed, the path trace unit conducts a path tracing from a designated clock pin. At the same time, the speed analyzing unit computes a clock path delay value, and a flag is set to a pin of a logic component connected to a designated clock pin. The path trace unit conducts a tracing process of wiring paths from clock input pins of all logic components, activates the timing check unit every time a pin to which the flag is set is traced to conduct a clock timing check on a logic component to which that pin belongs. Accordingly, it is possible to automatically and one-by-one conduct a clock timing check on wiring paths of all combinations between an enormous number of logic components operative in response to a clock signal from the clock system.
The delay value setting unit sets a predetermined delay value to an arbitrary pin and adds the predetermined delay value upon a delay computation by the speed analyzing unit so that a clock timing check can be conducted simultaneously on wiring paths operating in response to (asynchronous) clock signals having different cycles, and a delay value can be initialized to an arbitrary value at an arbitrary pin.
On the other hand, if the clock system is not yet designed, the search unit searches all logic components connected to the clock system, and a flag is set to a pin of each of the searched logic components. The path trace unit conducts a tracing process of wiring paths from clock input pins of all the logic components, and activates the timing check unit each time a pin to which the flag is set is traced to conduct a clock timing check on the logic component to which that pin belongs. Accordingly, even if the clock system is not yet designed, it is possible to automatically and one-by-one conduct a clock timing check on wiring paths of all combinations between an enormous number of logic components operating in response to a clock signal from the clock system and take a result of the check into consideration in a wiring design of the clock system.
The counter counts how many times a pin of each logic component is traced by the path trace unit, thereby grasping a pin having a high rate of passages of signals on the basis of a count value of the counter at the completion of the trace of all paths. Information in terms of a magnitude of frequency of passages of signals at each pin on the basis of a result of the count is displayed on the display unit. The designer can thereby discriminate a pin having a high frequency of passages of the signals, that is, a pin largely affecting on a delay improvement or the like only by referring to the display unit.
The region setting unit sets an executing region in which a tracing process and a delay computing process are performed. The tracing process and the delay computing process are performed only within the executing region and a result of the process is displayed on the display unit so that it is possible to conduct and display a process only in a region that the designer needs.
The trace control unit allows a selection of either a forward trace or a backward trace or a trace between two points according to an instruction through the input unit to automatically switch and control an operation of the path trace unit. At this time, since a delay computation is unfeasible in terms of a backward trace simultaneously with a path tracing, there is a case where a time for a process increases if a delay computation is always performed. Hence, a mode as to whether a delay computation is conducted in the event of a backward trace is set in advance, whereby a delay computation is conducted only if the designer wants.
A result of a tracing and a result of a delay computation are sorted as a list of trace destination pins and displayed on the display unit. The designer can thereby readily grasp pin names of the trace destination pins or a magnitude of each delay value from a display on the display unit.
At this time, a list of trace destination pins is hierarchically displayed on the display unit and information of a lower hierarchy corresponding to information of an upper hierarchy selected on the display unit is displayed on the display unit, whereby an enormous number of trace destination pins may be displayed compactly on the display unit. The external file writing unit writes the list of the trace destination pins into an external file, thereby storing or saving the list in the external file.
A schematic destination route diagram and a graph showing a delay value and an accumulated delay value at each position in the destination route diagram are displayed on the display unit. The designer can thereby discriminate a part on the wiring path through which a signal needs a longer time to pass at one glance.
At this time, schematic destination route diagrams or graphs of plural wiring paths are displayed simultaneously on the display unit. The designer can thereby compare delay conditions of plural wiring paths while referring them on the display unit.
The printing unit prints out the above schematic destination route diagram or the graph. The designer can thereby examine a delay condition of a wiring path while referring to a result of the print-out. In addition, the external file writing unit writes data of the schematic destination route diagram or the graph into an external file, thereby storing or saving the data in the external file.
According to an instruction through the input unit, an actual circuit diagram corresponding to the schematic destination route diagram is displayed on the display unit. The designer can thereby grasp a position on an actual circuit of the schematic destination route diagram on the display unit. Further, all wiring paths traced by the path trace unit are displayed with pin names in the form of a tree structure on the display unit and detailed information of a pin selected on the display unit according to an instruction through the input unit is displayed on the display unit. The designer can thereby readily acquire detailed information about each of the pins while grasping a whole of that wiring path.
In the above-mentioned circuit designing apparatus of an interactive type according to the third invention, the display control unit sorts coordinates of characteristic points in the order of their ascending or descending for each coordinate axis, substitutes them with coordinate values proportional to that order, and displays them on the display unit. The designer can thereby simultaneously grasp both a detailed part and a whole of a circuit that is an object of the design on the display unit.
At this time, points at both ends of a wire connecting pins and internally dividing points on the wire are taken out and displayed, thereby displaying more clearly a circuit that is an object of the design on the display unit.
If a wiring connection condition extends over plural layers, the display control unit adds an offset proportional to the order of layers to coordinates values after the substitution, and causes the display unit to display the characteristic point. The designer can thereby readily grasp wiring lines overlapping through the layer on the display unit. Further, an identifier common to before the substitution and after the substitution of the coordinates is set in advance, the designer can thereby readily recognize a correspondence between the characteristic point before and the characteristic point after the substitution.
In the above-mentioned circuit designing apparatus of an interactive type according to the fourth invention, the wiring route estimating unit conducts a virtual wiring between logic components in a stage where a placement in mounting is determined to estimate a wiring path, and the layout design unit actually wires the logic components according to a wiring order and a rate of roundabout determined on the basis of a result of the estimation by the wiring route estimating unit so that an efficient actual wiring is feasible while a condition of the wiring is estimated.
At this time, the congestion degree computing unit computes a degree of congestion in each grid on a circuit that is an object of a design as [(the estimated number of used channels on the basis of a result of the estimation by the wiring route estimating unit)/(the number of usable channels in each grid)], besides ranking the degree of congestion. The layout design unit preferentially conducts an actual wiring in a region in which wirings are expected to be congested on the basis of information of the ranking by the congestion degree computing unit so that an efficient actual wiring becomes feasible.
The routability judging unit judges a routability at a rate of roundabout designated in advance on the basis of a result of an estimation by the wiring route estimating unit. If the routability judging unit judges unroutable, the layout design unit determines a routable rate of roundabout to actually wire. It is thereby possible to reduce the number of unroutable parts as many as possible.
If a wiring by the layout design unit extends over plural layers, the wiring route estimating unit estimates wiring routes on each wiring layer, the congestion degree computing unit computes a degree of congestion on the basis of a result of the estimation for each wiring layer, and the layout design unit preferentially conducts an actual wiring of a net having a high degree of necessity of using a channel that is estimated to have a high degree of congestion on the basis of the degree of congestion of each wiring layer computed by the congestion degree computing unit so that an efficient actual wiring becomes feasible.
In the above-mentioned circuit designing apparatus of an interactive type according to the fifth invention, if a wiring by the layout design unit extends over plural layers and plural wiring layers having the same main wiring direction exist, wiring lengths different from wiring layer from wiring layer are designated in advance. The layout design unit conducts an actual wiring on a wiring layer selected among the plural wiring layers according to a wiring direction and a wiring length so that an effective use of each wiring layer becomes possible.
In the above-mentioned circuit designing apparatus of an interactive type according to the sixth invention, the layout design unit classifies nets that are objects of a wiring according to a critical degree to delay, and conducts an actual wiring between logic components in a wiring order and at a rate of roundabout according to the critical degree so that an efficient actual wiring can be conducted while a critical degree is taken into consideration.
At this time, the layout design unit conducts an actual wiring of another net according to the wiring tolerable degree set according to the critical degree so as to prevent a wiring parasitic capacitance from building up in a net having a high critical degree and a delay from increasing.
The above-mentioned circuit designing apparatus of an interactive type according to the seventh invention, if the placing check unit judges that a logic comp