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United States Patent4315251
Robinson , ; et al.February 9, 1982
Title
Automatic meter reading and control system
Abstract
An automatic meter reading and control system for communicating with remote terminal points includes a reading control center which selectively communicates with a meter terminal unit at each terminal point by way of a section control unit, each section control unit serving several meter terminal units. The section control unit is responsive to various commands issued by the reading control center to selectively route the commands to specified meter terminal units or groups of meter terminal units to direct the meter terminal units to selectively carry out a meter reading operation, a load control operation, a user alert operation or transfer of previously stored meter data or switch status data from the meter terminal units to the reading control center in accordance with functions specified by the various commands. Each meter terminal unit will effect the immediate execution of the function specified by a function code portion of a received command upon recognition of a first address type contained in an action field portion of the received command, and its assigned address which forms a portion of the contents of the first address type. In addition, the meter terminal unit will, again upon recognition of its assigned address, effect the execution of a specified function at a specified future time when it recognizes a second address type, the time of execution being specified in a time field portion of the second address type. BACKGROUND OF THE INVENTION I. Field of the Invention This invention relates generally to remote automatic communication systems and more particularly to a reading and control system for reading the measurement of commodities and status switches at remote terminal points along a utility power transmission network, and controlling loads and alerts at the terminal points. II. Description of the Prior Art Utility companies have long used meter reading personnel for reading the consumed commodity information provided by utility meters (i.e., gas, water, electricity and the like). However, in recent years significant strides have been made in the development of fully automatic meter reading systems. Most remote meter reading systems have similarities in their designs. Generally, they comprise some type of encoder device attached to a meter to give an indication of the meter reading, means for storing the meter reading indicated and a transponder for transmitting meter data over a communication link to a central station when interrogated by a signal from the central station. Various types of communication links have been used in transferring the meter data from the individual meters to the central station. One system utilized a mobile van carrying a transmitter for interrogating meter equipment transponders. The interrogated transponders would then return messages to the van, which messages included meter identification and reading. Various other types of systems have been developed which utilize the telephone lines of the subscribers as the communication link to the central station. Also, there are arrangements in which the power lines of the subscriber and the utility company are used as the link between the customer's meter and the central station. One such arrangement is described in U.S. Pat. No. 4,135,181, issued on Jan. 16, 1979 to Bogacki, et al and which is assigned to the assignee of the present invention. The Bogacki, et al arrangement comprises a central station which includes a computer with input-output equipment for the multiplex generation of commands and the multiplex receipt of data over a plurality of communication lines. A control unit is connected to a communication line and provides signal transmission and coupling of commands and data between the central station and a utility power line. The control unit includes means for recognizing addresses as well as means to decode a function code contained in commands received from the central station. When a control unit recognizes an allowable address in a command, it transfers that command to its connected power line. If the command function code specifies that the control unit is to receive a data message from the power line, the control unit will go into a receive mode after it has transferred the command. The system also includes a meter terminal unit located at each customer residence. Each meter terminal unit is connected to the power line, and receives commands from and transmits messages to the control unit over the connecting power line. Each meter terminal unit is capable of selectively communicating with a plurality of utility meter encoders for reading a plurality of meters and for selectively driving a plurality of loads at a customer residence. Each meter terminal unit responds to specific commands to either selectively read and store data into one of several storage means from a plurality meters as specified by the command function code; selectively transmit the previously stored meter data from the several storage means to its associated control unit; or selectively control the operation of the residence's loads as specified by the function code. Although the system of Bogacki, et al was a significant improvement over other prior art systems, it suffered from several disadvantages. These disadvantages include the relatively slow data through-put rate due to the slow bit rate, as well as the wait by the control unit for return messages after transmitting the message request commands. Another disadvantage is related to the number of meter terminal units which can communicate with a control unit. In a geographically widespread area, a meter terminal unit would have difficulty returning messages to the control unit unless a relatively high power, relatively expensive transmitter was included within that particular meter terminal unit. This would not only increase the expense of the system, it could also create the necessity to build more than one model meter terminal unit, depending on the remoteness of the meter terminal unit from its respective control unit. A further disadvantage concerns the relative insecurity of the system regarding customer load control. This concern is manifested in that assurance must be provided that a load will be restored after being turned off by the system. In addition, assurance must also be provided that premium rate billing for customer consumption during certain predetermined peak periods is performed only during those periods and not at other times. Consequently, it can be seen that a faster, more reliable system, having relatively few different models of components, which can be tailored in the field to accommodate future changes by the using utility company, is highly desirable. SUMMARY OF THE INVENTION The aforementioned advantages are provided by the present invention which provides a remote automatic meter reading, control and alert system, for reading the measurement of a commodity, controlling loads at a consumer or customer residence, and providing predetermined customer alert signals over a network of power lines. A Reading/Control Center (RCC), includes a computer which is connected to at least one Communications Interface Unit (CIU) for the multiplex generation of commands and the receipt of data over communication lines. The commands generated by the RCC contain at least an address portion and a command message portion. At least one control unit is connected to each of the RCC communication lines and provides signal transmission as well as, coupling of commands and data between the RCC and a power line. Control units may be grouped into sets, the individual control units being positioned in different geographical locations depending upon the needs of the using utility, as well as the expanse of the power line network. Each individual control unit can be modified or command controlled to receive messages from the power line only, and transmit those messages to the RCC, or both transmit commands onto the power line and receive messages from the power line. The system of the present invention permits simultaneous communication of commands and messages between the RCC, the control units and the power line in order to increase message data through-put. There is a meter terminal unit located at each customer residence. Each meter terminal unit is capable of selectively communicating with a plurality of utility meter encoders for reading a plurality of meters, for selectively driving a plurality of loads at a customer residence, for monitoring the status of a plurality of external contacts, and for selectively providing a plurality of alert signals to the customer. Each meter terminal unit includes a recever for receiving commands from the control unit over the powerline, as well as a transmitter for transmiting return messages to the control unit over the same power line. In order to increase the through-put capability, the meter terminal units can be placed into groups, with each meter terminal unit within a group having a different transmitting frequency thereby enabling all meter terminal units within a group to transmit return messages simultaneously over the power line. If required by the geographic distribution of the meter terminal units, a control unit can be provided at a power line location which is relatively close to the remotely located meter terminal units in order to receive messages from those terminal units for retransmission of the messages to the RCC. When control units are connected to the RCC as a set, a transmitter in each control unit transmits at a different frequency such that all control units within the same set can transmit back to the RCC simultaneously in order to increase the return message data through-put In order to further increase data through-put, each control unit can simultaneously receive from the RCC, transmit to the terminal units, receive a plurality of messages simultaneously from the terminal units within a group, and transmit to the RCC. The terminal units of the present invention can also receive commands to be executed at a specific time in the future. This causes a significant increase in the assurance that system controlled customer loads will be turned on after being commanded off since the terminal unit will only accept a command to turn off if in fact it has previously received a command to turn on at a specified future time. In addition, this feature also greatly enhances the performance of, as well as confidence in, the system with respect to accurate gathering of demand period commodity consumption, since the system will initiate a demand-on period only if it has previously received a command to terminate the demand period at a specified future time. This insures that the consumer is not charged the premium demand rate for erroneously extended periods. It is therefore an overall object of the present invention to provide a remote automatic meter reading, control and customer alert system having enhanced operating capabilities. It is another object of the present invention to provide an automatic utility reading system, with enhanced data through-put capability, for reading the measurement of a consumed commodity over utility power lines. A still further object of the present invention is to provide a remote automatic meter reading, control and customer alert system incorporating controls for improving the reliability of the measurement of customer peak demand usage and billing, as well as assuring that loads which have been commanded off by the system will once again be turned on. It is yet another object of the present invention to provide an automatic meter reading, control and alert system having improved command and message interlacing whereby the data through-put of the system is enhanced. Still a further object of the present invention is to provide an automatic meter reading, control and alert system incorporating simplified multi-interpretable command formats in order to enhance the integrity of customer billing information, system operation and increase the speed and consequently the data through-put of the system. These and other objects of the present invention will become apparent from the following more detailed description.
Inventors:Robinson; Paul B. (Durham, NH), Ouellette; Maurice J.  (North Berwick, ME), Schmidt; Larry A.  (Rochester, NH)
Assignee:General Electric Company (Somersworth, NH)
Appl. No.:135860
Filed:March 31, 1980
Current U.S. Class:340/870.02 340/870.03 340/825.2 340/825.52 
Field of Search:340/31R,31A,151,150,870.02,870.03,163,171R 179/2AM 364/483
U.S. Patent Documents
3622994November 1971Schoenwitz
4008458February 1977Wensley
4012734March 1977Jagoda et al.
4161720July 1979Bogacki
Primary Examiner: Groody; James J.
Attorney, Agent or Firm:Brunson; Robert E.
Claims

What is claimed is:
1. A remote automatic utility monitoring and control system including a terminal unit connected to a power line, said terminal unit comprising:
(a) means for receiving a command over said power line, said command including an action field portion and a function code portion; and
(b) decode means responsive to said received command to effect the immediate execution of the functions as specified by said function code portion when said decode means recognizes a first address type contained in said action field portion and further recognizes an address assigned to said terminal unit as specified by at least a portion of the contents of the first address type; and to effect the execution of the functions as specified by said function code portion at a specified time when said decode means recognizes a second address type contained in said action field portion, said time of execution being specified by a time field portion of the contents of said second address type, and further recognizes an address assigned to said terminal unit as specified by an address portion of the contents of said second address type.

2. A terminal unit in accordance with claim 1 additionally comprising:
(c) at least one meter including an encoder, said encoder generating data signals representative of a commodity reading measured by said meter;
(d) a plurality of function code identifiable storage means; and
(e) wherein said decode means, in response to a first function code type contained in the function code portion of a received command, selectively effects the storage data signals from said encoder, as measurement data information, into an identified one of said storage means; and, in response to a second function code type contained in the function code portion of a received command, selectively effects the transfer of information contained in a specified one of said storage means, as identified by the second function code type, to transmitter means for transmitting said information over said power line.

3. A terminal unit in accordance with claim 2 wherein said assigned address comprises:
(a) a main address uniquely assigned to a particular terminal unit of said system; and
(b) at least one auxiliary address, the contents of which are common to at least two terminal units of said system which are to respond simultaneously to a received command which contains said second address type having a predetermined information pattern in the address portion thereof.

4. A terminal unit in accordance with claim 3 including at least two auxiliary addresses comprising:
(a) a first auxiliary address, the contents of which are common to all terminal units which are to respond simultaneously to a received command which contains the second address type having a first bit pattern in the address portion thereof; and
(b) at least one additional auxiliary address, the contents of which are common to a block of terminal units, each block including a predetermined number of terminal units which are to respond simultaneously to a received command which contains the second address type having a bit pattern which is different from said first bit pattern in the address portion thereof.

5. A terminal unit in accordance with claim 4 including, in addition to said first auxiliary address:
(a) a second auxiliary address, the contents of which are common to a first block of terminal units, said first block including 1/16 of all terminal units in the system, which are to respond simultaneously to a received command which contains the second address type having a second bit pattern in the address portion thereof; and
(b) a third auxiliary addresss, the contents of which are common to a second block of terminal units, said second block including 1/32 of all terminal units in the system which are to respond simultaneously to a received command which contains the second address type having a third bit pattern in the address portion thereon.

6. A terminal unit in accordance with claim 3 wherein said decode means, in response to a third function code type contained in the function code portion of a received command having a recognized address, selectively effects the initiation of a demand on for a predetermined time period, said demand on period including at least one demand interval having a predetermined duration, wherein during said demand on period the difference of measurement data obtained at the beginning and end of each demand interval is compared to the largest difference obtained during a preceeding time interval of said demand on period, the larger of the two compared difference values being stored in an identified one of said storage means.

7. A terminal unit in accordance with claim 6 wherein the initiation of said demand on will take place only if a command containing a recognizable second address type has been previously received, said command containing a fourth function code type in the function code portion; and wherein said decode means, in response to said fourth function code type, effects the termination of the demand at a predetermined specified future time.

8. A terminal unit in accordance with claim 7 wherein said decode means, in response to said fourth function code type contained in the function code portion of a received command containing said second address type having a recognizable bit pattern in the address portion thereof, selectively effects termination of demand at a predetermined time, as specified by the time field portion thereof, after receipt of said command.

9. A terminal unit in accordance with claim 7 wherein said decode means, in response to said fourth function code type contained in the function code portion of a received command containing said second address type having a bit pattern in a predetermined portion of said address portion thereof which matches a predetermined portion of a bit pattern contained in an auxiliary address, selectively effects termination of demand at a predetermined time, as specified by the time field portion of said second address type, afer receipt of said command.

10. A terminal unit in accordance with claim 3 additionally comprising:
(f) at least one load control means for controlling a load associated therewith; and
(g) wherein said decode means, in response to a fifth function code type contained in the function code portion of a received command, selectively activates an identified one of said load control means to effect the turning off of the load associated therewith; and, in response to a sixth function code type contained in the function code portion of a received command, selectively activates an identified one of said load control means to effect the turning on of the load associated therewith.

11. A terminal unit in accordance with claim 10 wherein said decode means, in response to said fifth function code type contained in the function code portion of a received command containing said first address type having a bit pattern which matches a predetermined portion of a bit pattern contained in the main address, selectively activates a specified one of said load control means, as identified by the fifth function code type, to effect the turning off of the load associated therewith.

12. A terminal unit in accordance with claim 10 wherein the initiation of the burning off of an associated load will take place only if a command containing a recognizable second address type has been previously received, said command containing a seventh function code type in the function code portion; and wherein said decode means, in response to said seventh function code type, effects the turning on of the associated load at a predetermined specified future time.

13. A terminal unit in accordance with claim 10 wherein said decode means, in response to said sixth function code type contained in the function code portion of a received command containing said second address type having a recognizable bit pattern in the address portion thereof, activates, at a predetermined time after receipt of said command as specified by the contents of the time field portion of said second address type, as identified one of said load control means to effect the turning on of the load associated therewith.

14. A terminal unit in accordance with claim 10 wherein said decode means, in response to said sixth function code type contained in the function code portion of a received command containing said second address type having a bit pattern in a predetermined portion of said address portion thereof which matches a predetermined portion of a bit pattern contained in an auxiliary address, activates, at a predetermined time after receipt of said command as specified by the contents of the time field portion of said second address type, an identified one of said load control means to effect the turning on of the load associated therewith.

15. A terminal unit in accordance with claim 10 additionally comprising:
(h) at least one alert control means for controlling an alert device associated therewith; and
(i) wherein said decode means, in response to an eighth function code type contained in the function code portion of a received command, selectively activates an identified one of said alert control means to effect the turning on of the alert device associated therewith; and, in response to a ninth function code type contained in the function code portion of a received command, selectively activates an identified one of said alert control means to effect the turning off of the alert device associated therewith.

16. A terminal unit in accordance with claim 15 additionally comprising:
(j) at least one status means for monitoring the status of a switch associated therewith; and,
(k) wherein said decode means, in response to a tenth function code type contained in the function code portion of a received command, selectively effects the storage of a signal from said status means, as an indication of switch status, into an identified one of said storage means; and effects the transfer of the switch status from said one of said storage means to transmitter means for transmitting said measurement data over said power line.

17. A terminal unit in accordance with claim 3 wherein said decode means, in response to said first function code type contained in the function code portion of a received command containing said first address type having a bit pattern which matches a predetermined portion of a bit pattern contained in the main address, selectively effects the storage of data signals from said encoder, as measurement data information, into an identified one of said storage means.

18. A terminal unit in accordance with claim 3 wherein said decode means, in response to said second function code type contained in the function code portion of a received command containing said first address type having a bit pattern which matches a predetermined portion of a bit pattern contained in the main address, selectively effects the transfer of information contained in a specified one of said storage means, as identified by the second function code type, to said transmitter means for transmitting said information over said power line.

19. A method of delaying execution of a command by a terminal unit of a remote automatic utility monitoring and control system, said method comprising the steps of:
(a) receiving a command having a function code portion and an action field portion, said function code portion containing a specified function to be performed, and said action field portion containing an execute hence type address including an address portion containing specified terminal unit address information and a time field portion containing a specified value of time;
(b) storing the contents of said function code and said time field portions of a command having a recognizable address portion;
(c) decrementing the stored contents of said time field portion at predetermined equal intervals; and
(d) performing the function specified by the stored contents of said function code portion when the contents of said stored time field portion has been decremented to zero.

20. A method of enhancing the security of a remote automatic utility monitoring and control system including a terminal unit for performing specified functions, said method comprising the steps of:
(a) transmitting to said terminal unit a first command having a function code portion and an action field portion, said function code portion containing a specified function to be performed, and said action field portion containing an execute hence type address including an address portion containing specified terminal unit address information and a time field portion containing a specified time interval for delaying the performance of said specified function;
(b) storing the contents of said function code and said time field portions of a first command having a recognizable address portion;
(c) transmitting to said terminal unit a second command having a function code portion and an action field portion, said function code portion containing a specified function to be performed which is an opposite of the function specified in said first command, and said action field portion containing an execute immediate type address including an address portion containing address information identifying the same terminal unit addressed by the first command; and
(d) performing the function specified in the function code portion of the second command only if the opposite function specified in the first command has been received and stored by the terminal unit for execution thereby at the expiration of said specified time interval.

21. A method in accordance with claim 20 wherein step (a) includes transmitting to said terminal unit a first command, the function code portion of which contains a demand off function and step (c) includes transmitting to said terminal unit a second command, the function code portion of which contains a demand on function.

22. A method in accordance with claim 20 wherein step (a) including transmitting to said terminal unit a first command, the function code portion of which contains a load on function and step (c) includes transmitting to said terminal unit a second command, the function code portion of which contains a load off function.
Description
BRIEF DESCRIPTION OF THE DRAWING

The present invention may be more readily understood by reference to the accompanying drawing in which:

FIG. 1 is a major block diagram of the system of the present invention;

FIG. 2 is a block diagram illustrating the concept of control unit sets of the present invention;

FIG. 3 is a major block diagram of a meter terminal unit of the present invention;

FIG. 4 is a diagrammatic representation of the relationship between a start of message sequence and an idle pilot modulation of a power line carrier;

FIG. 5 is a diagrammatic representation of the preferred pattern of an outbound command from a control unit to a meter terminal unit;

FIG. 6 is a diagrammatic representation of a preferred pattern of an inbound message from a meter terminal unit to a control unit;

FIG. 7 is a diagrammatic representation of the preferred pattern of an outbound command from a reading/control center to a control unit;

FIG. 8 is a diagrammatic representation of the preferred pattern of an inbound message from a control unit to a reading/control center;

FIG. 9 is a matrix chart showing the relationship of commands to be implemented by an MTU to bit patterns of a function code field in an outbound command;

FIG. 10 is a block diagram of a preferred embodiment of the information processor portion of a meter terminal unit;

FIG. 11 is a block diagram depicting the relationship between a meter terminal unit and its associated encoding meters, alerts, controlled loads and status switches;

FIGS. 12a-c depict memory maps of a microprocessor internal random access memory, an address programmable read only memory, and a meter encoder data random access memory, all of which information storage devices are part of a preferred embodiment meter terminal unit;

FIGS. 13a-c depict expanded portions of the microprocessor internal RAM and the meter encoder data RAM as shown in FIG. 10;

FIGS. 14 through 28 are flow charts describing the operation of various subroutines performed by the microcomputer of the meter terminal unit to effect performance of the functions to be carried out by the meter terminal unit;

FIG. 29 is a major block diagram of a section control unit of the present invention;

FIGS. 30 and 31 comprise an elementary logic schematic block diagram of the section control unit of FIG. 29;

FIG. 32 is a timing diagram showing the phase relationship of various timing signals generated in the section control unit;

FIGS. 33a and 33b depict memory maps of a microcomputer random access memory and an addressable electrically programmable read only memory, both of which are part of a preferred embodiment section control unit;

FIGS. 34 through 38 and 40 through 44 are flow charts describing the operation of various subroutines performed by the microcomputer of the section control unit to effect performance of the steps and functions to be carried out by the section control unit;

FIGS. 39 and 49 and 50 are system interlace timing diagrams useful in understanding the flow of commands and messages between the reading control center and meter terminal units via the section control units of the system of the invention;

FIG. 45 is an orthongonally arrayed illustration showing how the section control unit organizes received meter terminal unit messages and section control unit commands for transfer to the reading control center; and

FIGS. 46 through 48 illustrating some possible system arrangements utilizing addressable sets of section control units for transmission and reception of commands and messages between the various units of the system as an aspect of preferred embodiments of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

System Description

Referring to FIG. 1 of the drawing, there is shown an overall block diagram of the preferred embodiment of the system of the present invention, generally designated 10. The system 10 comprises a reading/control center (RCC) 12 which communicates with a section control unit (SCU) 14 over a first communication link 16. The SCU communicates with one or more meter terminal units (MTU) 18 as required by the system user, which requirements will be adduceable by those skilled in the art upon further reading of the detailed description herein, over a second communication link 24. Each MTU 18 has the capability of reading a plurality of meter encoders 54; control a plurality of external loads 58 and alerts 56; and reporting the status of a plurality of external contacts (not shown). In the preferred embodiment, one MTU 18 can read three meter encoders 54; control three external loads 58 and two alerts 56; and report the status of six external contacts.

Although there are many meters presently available which can be used in the system of the present invention, in the preferred embodiment, the meters employed should have encoders for transferring consumed commodities such as power, water or gas to the MTU's for storage for subsequent transmission to the RCC. Several types of encoder type meters are known such as contact switch closure types, parallel switch closure types, optical read out types, etc. The present system preferably employs a mechanical non-destructive storage encoder which provides a meter serial data read out as disclosed in U.S. Pat. No. 3,846,789, issued Nov. 5, 1974, entitled, "Remote Reading Register With Error Detecting Capability", to Germer, et al and assigned to the assignee of the present invention, which patent is incorporated in this detailed description as if fully set forth herein.

System control is directed by the RCC which includes a data processor or digital computer 26 which communicates with the rest of the system through one or more communications interface units (CIU) 28. The computer is of a general purpose type having sufficient memory capacity to store data pertaining to the entire system and is programmed to transmit messages or commands throughout the system and to collect data from the system as described hereinbelow. Many such digital computers are commercially available, and the computer selected for the preferred embodiment system is a Hewlett Packard Model 2113E minicomputer.

Each CIU 28 issues commands and receives data, preferably in a multiplex mode, over the first communication link 16, which in the preferred embodiment is a voice grade telephone circuit, the use of which is preferably dedicated to the system. It will be noted that each telephone line used in the first communication link 16 is preferably terminated by a modulator/demodulator circuit (modem) 30 on each end thereof.

It is normally desirable that the SCU 14 be installed in a substation of the using utility and that the SCU communicate with that substation's entire complement of MTU's. However, it is possible that satisfactory operation in some cases can only be obtained with additional SCU's. Although these additional SCU's may be complete SCU's, it might be more economically desirable that they be "receive-only" SCU's since the inbound communication path from the MTU's is less powerful than the outbound communication path from the SCU to the MTU's. Consequently, the system of the present invention includes the concept of SCU sets in which a transmitting SCU acts in concert with a receiving SCU. This concept will be more fully described hereinafter.

The data rate between the CIU 28 and any one SCU set is preferably 300 baud full duplex, therefore enabling the use of, in the preferred embodiment, one subchannel (f.sub.1) for permitting the transmission of outbound commands from the RCC to the SCU and three subchannels (f.sub.2, f.sub.3, f.sub.4) for permitting the transmission of inbound messages from the SCU set to the RCC, see FIG. 2. In a system configuration in which there are relatively few MTU's per SCU set, all SCU sets can share a single inbound subchannel since the amount of inbound data is relatively small. In a system configuration having more MTU's and SCU sets, but still with relatively few MTU's per set, the system can be expanded to utilize two or more of the inbound SCU to RCC subchannels (f.sub.2, f.sub.3 or f.sub.4) as is depicted in the block diagram of FIG. 2. Transmission of data between the modems 30 is preferably of the frequency shift keying (FSK) type; however, other types of transmission may also be employed. Each of the modems 30 are preferably of the voice frequency type of a commercially available transmitter/receiver. Typical transmitters and receivers of the type which may be employed in the present system as modems are models G8AT-2F and G8R-2F/3F manufactured by RFL Industries, Inc.

As previously stated, each SCU is connected to a second communications link 24 which, in the preferred embodiment electrical utility application, is an electrical power transmission line. The power transmission line has at least one MTU 18
connected thereto, as shown in FIG. 1. As represented by the dotted line in FIG. 1, the electricl power transmission line 24 may have a plurality of MTU's connected thereto. In the preferred embodiment, the transfer of commands and data between the RCC
12 and the SCU's 14 over the voice grade lines 16 is performed in the format of ASCII asynchronous characters. Commands or messages issued by the RCC 12 are transferred by the SCU's 14 to their corresponding power lines 24 by means of carrier signals which are binary phase modulated at 30 bps.

As previously stated and diagrammatically depicted in FIG. 2, the preferred embodiment outbound commands from the RCC 12 to the SCU's 14 are transmitted over the phone lines 16 using a single tone or carrier frequency f.sub.1. In the preferred embodiment f.sub.1 equals 660 Hz. As also stated above, the SCU's 14 can transmit inbound data messages to the RCC 12 using one of three preassigned sub-channel frequencies f.sub.2, f.sub.3 or f.sub.4. In the preferred embodiment, f.sub.2 equals 1260
Hz (sub-channel 1), f.sub.3 equals 1860 Hz (sub-channel 2) and f.sub.4 equals 2460 Hz (sub-channel 3). Also depicted in FIG. 2, outbound commands are transmitted at a frequency f.sub.0 over each SCU's respective power line 24 to a plurality of meter terminal units 18 (MTU's) connected to each of those power lines. In response to certain commands, the MTU's 18 will respond with data representative of a measured commodity at a specific frequency (fI.sub.1 -fI.sub.8). Table 1 illustrates representative power line transmission or carrier frequencies which are employed in the preferred embodiment of the system of the present invention.

TABLE 1 ______________________________________ CARRIER FREQUENCY (H.sub.z) ______________________________________ f.sub.0 (SCU Outbound) 5010 (Inbound) f.sub.I1 6630 f.sub.I2 6990 f.sub.I3 7350 f.sub.I4 7710 f.sub.I5 8130 f.sub.I6 8550 f.sub.I7 9030 f.sub.I8 9510 ______________________________________

As noted in Table 1 and depicted on FIG. 2, f.sub.0 specifies the frequency of the carrier carrying outbound commands from the SCU 14 to the MTU(s) 18. f.sub.I1 -f.sub.I8 specifies the power line carrier frequencies transmitted by a group 8
MTU's connected by the power line to the SCU 14 transmitting the f.sub.0 carrier whether that SCU be a single SCU or the transmitting SCU in a set.

Referring again to FIG. 1, each of the MTU's 18 is located at metering locations such as household residences, business residences, factories or the like. Each MTU 18 responds to an outbound command originally generated by the RCC 12. Although each command, which is acted upon by the MTU 18, will be discussed in detail subsequently, generally the MTU can be commanded to read and store meter data, perform demand read and calculation on the meter data, transmit previously stored meter or demand data, turn loads off and on, turn customer alerts on and off, and provide the status of external contacts.

An outbound command from the RCC 12 to the MTU's 18 by way of an SCU 14 contains an MTU address portion and a command function code which specifies the particular function to be carried out by the addressed MTU 18, as will be described in detail subsequently. It should be noted that MTU's are individually addressable, group addressable, or block addressable, as will be subsequently described. One MTU 18 is generally addressed when it is desirable to interrogate only one particular residence, for example, during meter survey operations or individual load switching. During normal meter reading operations, however, groups of 8 MTU's are generally addressed for reasons which will become more clear in the ensuing description.

There are situations in a large power system when it is either desirable, or necessary, to quickly remove all loads from the entire system. This would occur, for example, under conditions of a catastrophic power failure which necessitates a mass scramble to shut down an entire system to prevent damage to the power transmission equipment. In this latter situation, the MTU's 18 can be addressed in large blocks or, if desired, all MTU's in an entire system can be simultaneously addressed. The unique addressing scheme of the system of the present invention permits calling on small concentrated groups of MTU's 18 for the transmission of meter data, or for the performance of various functions in large geographically dispersed blocks of MTU's for simultaneous action such as read and store data and load control.

Message Data Formats

Prior to proceeding with the further description of the system, it is considered advantageous at this time to provide a description of the various messages and data formats of the information transferred between the RCC 12 and the SCU's 14 and MTU's 18 of the system. Reference is now made to FIG. 7 which illustrates the format of outbound commands transferred from the RCC 12 to the SCU's 14. It should be noted that the command is in ASCII format, although ASCII codes are not used. Each character includes a start and stop bits (not shown) at the beginning and end respectively of a character. In the preferred embodiment, a parity bit is also set for odd parity. Seven information bits plus the parity bit are included between the start and stop bits of each character. The first two characters received by an SCU from the RCC is the transmitting SCU address field. This field can address all SCU's simultaneously (all zeros contained in the 14 information bits) or can address one of
16,382.sub.10 individual SCU's. A field containing all ones is not used. The next two characters comprise a receiving SCU address field, having a format which is the same as the transmitting SCU address field described previously. Character 5 includes a seven bit function code field which determines a particular action to be taken by the receiving unit (SCU or MTU) which function shall be subsequently described in detail.

The sixth, seventh, eighth and ninth characters comprise an MTU action field containing 25 bits. The contents of the MTU action field will be subsequently described in detail in conjunction with the detailed description of the MTU itself. Note that character nine contains three fill bits in order to meet formatting requirements. Character ten contains seven bits which establish odd parity with respect to bits one through seven of each of the characters five through nine. The eighth bit of character ten establishes odd parity within that character in the same manner as the parity bits within the other characters. The longitudinal parity character is added to increase the transmission security of that portion of the command that is retransmitted over the power line. Since characters one through four are not retransmitted, as will be subsequently described, longitudinal parity is established only with respect to characters five through nine. It should be noted that when the RCC is not transmitting outbound command characters, it sends idle characters consisting of the usual start and stop bits with eight ones in each idle character. Note that the parity bit is even for the seven one bit fill characters. The SCU's reject these fill characters as information because of the invalid (even) parity, but uses them to maintain synchronism with the RCC.

Reference is now made to FIG. 5 which illustrates the format of outbound commands transmitted from the SCU 14 to its associated MTU's 18 over the power line network. It can been seen that the command format is the same as characters five through ten of the RCC to SCU command but has in addition a start of message (SOM) field comprising six bits. As shown diagrammatically in FIG. 4, the first three bits of the start of message field have the same phase as the bit preceeding, while the last three bits have opposite phase from the first three. The first three bits are defined as logic zero and serve as the phase reference for all subsequent bits in the command work. When not sending outbound commands, the SCU continually modulates its power line carrier at the character rate (30 bps in the preferred embodiment) received from the RCC. This idle modulation (idle pilot) comprises continuous phase reversals at the bit rate as shown in FIG. 4. Upon generation of an outbound command, the carrier is modulated by the start of message bit sequence which is then followed by the command. As seen in FIG. 4, the start of message sequence thus represents a clear break in the alternating phases of the idle pilot. Note that 0 and pi represent relative character phases in radians. The diagram depicted in FIG. 4 would be equally valid if the zeros and pis were interchanged.

Reference is now made to FIG. 6 which shows the format of inbound messages transmitted from an MTU(s) 18 to an SCU(s) 14. This inbound message comprises a total of 54 bits including parity. The message starts out with a start of message (SOM) sequence which comprises six bits of one carrier phase defined as logic zero. The start of message sequence is followed by a message field comprising five characters. Included in the message field is a flag field comprising three bits, and a fill field comprising two bits. The flag code contained in the flag field is a function of the activities at the MTU 18 as will be subsequently described. The final character in the message pattern is used to establish longitudinal parity in the manner as was previously described with respect to the outbound command patterns.

Referring to FIG. 8, there is shown the format of inbound messages transmitted from an SCU to the RCC. As indicated in FIG. 8, each inbound message comprises 52 characters. As previously stated, the data transmitted from the MTU's 18 to an SCU
14 is preferably frequency multiplexed and received from a group of of eight MTU's at a time. In other words, it is preferred that eight MTU's respond to a transmit command and consequently the receiving SCU must accept all eight simultaneously in eight receivers. The SCU 19 transmits to the CIU 28 in asynchronous ASCII character format, though the ASCII codes and parity are not used. The usual start and stop bits are included, with exactly one stop bit per character required. The characters for the messages from the SCU 14 to the RCC 12 are formed in real time as the eight MTU data streams are received by the SCU. The first bit from frequency f.sub.I1 becomes the first bit in the first character; the first bit from f.sub.I2 becomes the second bit in the first character and so on with the first bit from f.sub.I8 becoming the eighth bit in the first character (see FIG. 45). Similarly, as indicated in FIGS. 8 and 45, the second bits from all eight receivers form the second character and so forth through the 48.sup.th character which is formed by the 48.sup.th bits from all eight receivers. It should be noted that there is no character parity in the usual sense.

The SCU then adds information generated internally in the form of four additional characters, 49 through 52. Character 49 is not used. Character 50 includes carrier and status condition information. Character 51 comprises the seven LSB's of the SCU's address plus odd parity while character 52 comprises the seven MSB's of the SCU's address plus odd parity. Note that in the system of the present invention, it is possible that an outbound command from an SCU 14 to the MTU's 18 requires no concomitant inbound message, as will be subsequently described with respect to the detailed description of the MTU. In this case, the SCU still returns the same 52 characters as described above and with the same timing. Also in this case, the SCU sends an image of its 48 bit receive command onto the MTU's as previously described for FIG. 5. Similarly, if the outbound command received by the SCU requires action to be performed by the SCU itself or a command to the MTU's with no response expected, the SCU will again return an image of its received commands as described above.

Meter Terminal Unit (MTU)

As previously stated, the meter terminal unit (MTU) 18 is intended primarily for location on a residence where it will perform the load management functions of meter reading, both during regular periods as well as specialized peak periods which will be subsequently explained, load control, consumer alerting and status monitoring. The MTU 18 communicates with the section control unit (SCU) 14 over the utility's power distribution network 24. The MTU 18 communicates with the metering, control and alert devices over local hard wire circuits.

Referring now to FIG. 3 there is shown an overall block diagram of a meter terminal unit (MTU) generally designed 18. The MTU 18 comprises a receiver 40, which is electrically connected to the power line 24. Signals are output from the receiver
40 to an information processor 44 over a plurality of lines 46. The information content of signals transferred over the plurality of output lines 46 will be subsequently described in conjunction with the description of the information processor 44. The receiver 40 receives an input clock signal from the information processor 44 over an input line 48. The information processor 44 outputs signals to a transmitter 50 over a plurality of output lines 52. The content of the signals output from the information processor 44 to the transmitter 50 over lines 52 will be described in detail in conjunction with the description of the information processor 44. The transmitter 50 is electrically connected to the power line 24.

The information processor 44 outputs signals to a plurality of encoders 54, alerts 56 and loads 58 over a plurality of output lines 60. The information processor receives signals from the encoders 54 and a plurality of status switches 62 over a plurality of input lines 64. As previously stated, there are three encoding meters 54 in the preferred embodiment, each encoding meter 54 being preferably of the type shown and described in U.S. Pat. No. 3,846,789. In the preferred embodiment, there are two alerts 56 which may be, for example, lights to alert the customer of peak power and/or demand periods. Also in the preferred embodiment, there are three loads 58 each of which comprises an output contact suitable for operating an external power-handling device. In addition, it is preferable that the MTU be able to report status of six external contacts 62 which are monitored by means of a voltage generated within the MTU 18 and applied across each of the six external contacts 62.

In the preferred embodiment, the receiver 40 is a receiver for phase shift modulated carrier signals as shown and described in copending U.S. patent application Ser. No. 106,451, inventor W. C. Hughes, filed Dec. 26, 1979, which receiver preferably incorporates a phase-locked loop stabilized by a crystal oscillator as shown and described in copending U.S. patent application Ser. No. 103,032, inventors W. P. Hackert, et al, filed Dec. 13, 1979, both of which applications are assigned to the assignee of the present invention, and both of which applications are incorporated in this detailed description as if fully set forth herein. The transmitter 50 is preferably of the type shown and described in copending U.S. patent application Ser. No. 106,452, inventor W. C. Hughes, filed Dec. 26, 1979, which application is assigned to the assignee of the present invention and which application is incorporated in this detailed description as if fully set forth herein.

Referring to FIG. 10 there is shown a more detailed block diagram of the information processor 44. The information processor 44 comprises a microcomputer 66 which, in the preferred embodiment, is an Intel Corporation Model 8049 Microcomputer. The microcomputer 66 incorporates a first, 68, eight bit quasi-bidirectional port (P1); a second, 70, eight bit quasi-bidirectional port (P2); an eight bit bidirectional port (BUS) 72; an internal random access memory (RAM) 74; as well as various clock, enable and strobe signals, all of which are shown and described in the Intel Corporation Publication entitled, "MCS-48.TM. Family Of Single Chip Microcomputers User's Manual", published July 1978 by the Intel Corporation, 3065 Bowers Avenue, Santa Clara, Ca. 95051. This publication describes the architecture and operation of the type 8048 microcomputer and is incorporated by reference in this detailed description as if fully set forth herein.

A phase locked loop circuit 76, of the type shown and described in U.S. patent application Ser. No. 103,032, previously referenced and incorporated herein, receives a 60 Hz input signal from the power feeder line 42. The output of the phase lock loop circuit 76 is a 60 Hz square wave which is synchronized to the 60 Hz signal present on the power feeder line. The 60 Hz square wave signal is input to the T1 input pin which is designated an event counter input for the microcomputer and is described in the previously referenced "User's Manual ". Input pin (T0) receives a receive clock (RC) strobe from the receiver, which is used by the microprocessor when receiving data from the receiver 40 as will be subsequently described. Note that the phase locked loop circuit 76 also supplies a 61,440 Hz signal to the transmitter 50, as well as a 983,040 Hz signal to the receiver 40.

A first terminal of P1, 68, is electrically connected to an encoding meter enabling input whereby a first encoder message select signal (EMS1), generated by the microcomputer 66, enables the drive motor and lamp of the preferred embodiment first meter encoder 54a as disclosed in previously referenced Pat. No. 3,846,789. Likewise, a second terminal of P1 is electrically connected to the second meter encoder 54b for providing a second enabling signal EMS2 and a third terminal of P1 is electrically connected to a third meter encoder 54c for providing a third enabling signal EMS3, see also FIG. 11. As shown in FIG. 11, each encoder message select signal (EMS1-EMS3) is electrically connected to a respective encoder relay driver 78 which in turn activates a respective encoder relay 80 which then completes a power on circuit to a respective encoder motor and lamp.

The fourth and fifth terminals of P1 are electrically connected to respective alert relay drivers 82 which in turn are electrically connected to respective alert relays 84 (see FIG. 11). The fourth and fifth terminals of P1 output alert signals (AS1 and AS2) which turn on the respective alert relay drivers 82. Each relay driver 82 then activates its respective alert relay 84 for providing a closed circuit path through which the respective alert indicator 56a or 56b is turned on. The sixth, seventh, and eighth terminals of P1 are electrically connected to respective load control relay drivers 88 which in turn are electrically connected to respective load control relays 90 (see FIG. 11). An appropriate load signal (LS1-LS3) appearing at a particular terminal will turn on a respective load control relay driver 88 which in turn will activate a respective load control relay 90. The load control relay 90 causes a respective load 58a, 58b or 58c to turn off or on.

Referring again to FIG. 10, two terminals of P2 are electrically connected to the receiver 40 for enabling the microcomputer 66 to receive an outbound receive data (OBRD) signal and a transmit clock (TC) signal from the receiver 40. Two other terminals of P2 are electrically connected to the transmitter 50 thereby enabling the microcomputer 66 to provide an inbound transmit data (IBTD) signal and an inbound transmit gate (IBTG) signal to the transmitter. The eight terminals of the bidirectional port (BUS) 72, are electrically connected to an address latch circuit 94 which receives and stores address information which is output from the microcomputer 66. The address latch circuit 94 preferably comprises eight flip/flops such as included in a pair of Intel Corp. LS 175's. An address latch enable (ALE) terminal of the microcomputer 66 is electrically connected to a clock input (CK) of the address latch circuit 94 to enable the computer to control the latching of the address latch circuit 94 as will be subsequently described. A read (RD) terminal of the microcomputer 66 is electrically connected to a DIS input of a multiplexer 96, one input of an and gate 98 and an output data (OD) terminal of an encoder data random access memory (RAM) 100. The multiplexer 96 is preferably an Intel Corp. Model No. 4512 and the encoder RAM 100 is preferably an Intel Corp. Model No. 5101L. The signal appearing on this line (RD) is an output strobe which is activated during a BUS read and is described in the microcomputer "User's Manual".

The multiplexer 96 receives an encoder strobe signal (ES1, ES2 or ES3) as well as an encoder data signal (ED1, ED2 or ED3) from each of the three meter encoders 54. The multiplexer 96 also receives signals (ST1-ST6) from the six status contacts
102 (see FIG. 11) in the form of switch closures. The multiplexer is addressed by bits zero through two (AD0-AD2) of the address output by the address latch circuit 94. Data is output from the multiplexer 92 into the microcomputer 66 by way of bit 7
(BUS7) of the bidirectional BUS port 72. The encoder data RAM 100 stores data preferably in the locations diagrammatically shown in the memory map depicted in FIG. 12. The data stored in the RAM 100 is addressed by bits zero through seven (ADO-AD7) of the address output by the address latch circuit 94. The encoder data RAM 100 receives a read (RD) and write (WR) output strobe from the microcomputer 66 during a respective BUS read or write as described in the microcomputer "User's Manual " previously referenced. The data is read from or written into the encoder data RAM 100 by way of the bidirectional BUS port 72 of the microcomputer 66. An address programmable read only memory (PROM) 104 stores data in locations preferably indicated by the memory map of FIG. 12. The address PROM 104 is preferably an Intel Corp. Model No. 5331. The address PROM 104 receives an enable signal (CE) from the and gate 98 upon coincidence of the read strobe (RD) and a memory strobe (MS), at which time the contents of the addressed location of the address PROM 104 is read into the microcomputer 66 through the BUS port 72. The address PROM 104 is addressed by bits zero through four (ADO-AD4) of the address output by the address latch circuit 94.

As described above, each MTU 18 has the capability of reading three meter encoders 54, of controlling three external loads 58 as well as, two external alerts 56, and of reporting the status of six external contacts 62. The MTU 18 exercises its functions in response to commands received from the SCU 14. Although previously described, it is appropriate that the commands received from the SCU 14 be discussed again at this time. As previously stated, the power line carrier transmitted by the SCU
14 is normally constantly modulated at the bit rate, which is 30 bits per second in the preferred embodiment, allowing the MTU 18 to synchronize to it. The start of a command is denoted by the lack of phase reversal characterizing the first start of message (SOM) bit, as shown in FIG. 4.

In the pattern of the outbound command from the SCU 14 to the MTU 18, as shown in FIG. 5, a function code field, comprising seven bits, follows the start of message (SOM) sequence. The function code field determines what type of function an addressed MTU 18 will perform. The different types of functions performable by the MTU of the preferred embodiment will be discussed subsequently. The function code field is followed by an MTU action field comprising 25 bits. The MTU action field is interpreted as an MTU address for all function codes except "action at SCU", in which case the outbound command will be ignored by the MTU. The MTU action field is followed by a fill field comprising three bits which are required for correct formating of the command. These fill bits have no informational content. At the end of each command is a longitudinal parity (LP) field comprising eight bits. The eight bits comprising longitudinal parity are generated by the CIU on the five characters (35
bits) which comprise the MTU message field as shown in FIG. 5. Bits one through seven of the longitudinal parity character establish odd parity with the bits one through seven, respectively, of the five characters contained in the message field. Bit eight of the longitudinal parity character is set to establish odd parity within the LP character itself. The longitudinal parity character is added to increase the transmission security of the command that is transmitted over the power line. Note that this level of security is not needed over the phone line which provides the communication link between the RCC and the SCU.

As previously stated, the MTU will normally receive a continuously modulated carrier to which it synchronizes its internal bit clock. A change in the modulation pattern, which is provided by the start of message sequence, denotes the start of the 54 bit outbound command as shown in FIG. 5, which the MTU then takes in and decodes. Each command must pass four tests before the MTU will act on it. First, the MTU tests for odd transverse parity on each of the five groups of eight bits (or five characters) after the first start of message (SOM) bit sequence. The MTU then tests for odd longitudinal parity as contained in the sixth group of eight bits (or sixth character) as previously described.

Each MTU in the system of the present invention has its own unique 24 bit programmable read-only memory set (PROM-set) main address (THISMTUAD) plus three PROM-set auxiliary addresses (AUXAD 1, 2 and 3, see FIG. 12b). Consequently, the MTU will test the bits in the MTU action field and respond to any of the following five types of addresses. These addresses can be characterized as block addresses, group addresses, or a single MTU address. The block addresses comprise, in the preferred embodiment, three different types of addresses. First, all MTU's having a "1" in the most significant bit of its PROM (MSB) auxiliary address one (AUXAD 1) will be addressed if bits 12 through 25 of the MTU action field in the receive command are all zeros. Second, those MTU's having a "1" in the most significant bit (MSB) location of auxiliary address two (AUXAD 2) and wherein the four least significant bits (LSBs) of AUXAD 2 match bits 13 through 16 of the MTU action field, will respond if bits 17
through 25 of the MTU action field are all zeros. This will be referred to as a 1/16 level block address hereinafter. Third, if bits 17 through 24 of the MTU action field in the receive command are all zeros, bit 25 is a one, those MTU's in which the most significant bit (MSB) of AUXAD 3 is a one and the five least significant bits of AUXAD 3 match bits 12 through 16 of the MTU action field of the receive command will respond to that command. This will be referred to as a 1/32 level block hereinafter.

Groups of eight MTU's are addressed if bit 25 of the MTU action field of the receive command is a zero and bits four through 24 match the main address of the MTU's. Finally, a single MTU is addressed if bit 25 of the received address is a one and bits one through 24 of the MTU action field match the MTU's main address. It should be noted that the block addresses also include an 11 bit time field which will be discussed hereinafter.

Assuming that the MTU has successfully tested parity, longitudinal parity and has received a recognizable address, the MTU must then find an executable seven bit function code. In the system of the present invention, there are a plurality of functions which are executable by the MTU. Referring now to FIG. 9 there is shown a matrix diagram of the command functions possible in the preferred embodiment of the present invention. The particular function to be performed is specified by the information contained in the function code field of the outbound command message (see FIG. 5). The column headings across the top of the matrix O through F, represent the four least significant bits one through four of the function code field in hexadecimal code notation. The row headings at the left of the matrix represent the three most significant bits, five-seven of the function code field in hexadecimal code notation. XMIT A-H, J-L represents a command to the MTU to transmit the contents of a particular register A-H, J-L. XMIT STATUS ADDR represents a transmit address and status command which causes the MTU to read its own 24 bit PROM-set address plus the six external status contacts and to transmit this information to the SCU. RESET, A-H signifies that the MTU is commanded to initialize the designated register A-H.

DEM 1-2, A-C, E-G signifies a demand command for a particular meter and a designated register. In the preferred embodiment, this function applies to one of two meters (1, 2) and to one of six registers (A-C, E-G). For a given meter, this function can represent a new demand-on command, if demand was previously off; a transfer-demand command if demand has previously been on for the same meter but a different register; or a demand-off command. Note that before the MTU executes a demand command affecting a particular meter, the following conditions must exist. First, at least one demand command affecting the same meter must already be stored for execution hence. Second, the next command code to be executed (that is, the shortest time remaining) among those identified in the second condition, must have opposite parity from the one about to be executed. That is, even and odd commands must alternate. This is why, in the preferred embodiment, there are locations in the matrix for two demand on for meter X in register Y functions. Note that meeting the three conditions described above will assure that demand will not be started without the command to end it already in place. If the conditions are not met, the MTU will not execute the demand on command and will terminate demand currently in process, as will be subsequently described. When the MTU meets the conditions above, it turns on its demand feature, then immediately for every demand period thereafter follows the sequence for automatic demand as will be subsequently described.

DEM 1, 2 OFF indicates demand off for meter 1 or 2. This command terminates demand for the specified meter. ALERT 1, 2 ON, OFF represents a command to turn the designated alert on or off. In the preferred embodiment, there are two external alerts and an ON command closes the corresponding alert contact while an OFF command opens the contact. LOAD 1-3, ON-OFF represents a command to turn the designated load on or off. In the preferred embodiment, there are three loads (1-3) and an ON command opens the designated output contact while an OFF command closes the designated output contact. R&S 1-3; A-H, J-L represents a command to read a specified meter encoder (1-3) and store the reading in a particular register (A-H, J-L).

FIG. 12b is a memory map depicting the reserved areas in the MTU address programmable read only memory (PROM) 104. The area designated DEMID, contains the demand time interval specified for the MTU. Above that is an area designated THIS MTU ADR, which area contains the address of the particular MTU. Above that is an area designated L FLAGS which contains certain preprogrammed load control flags, the use of which will be subsequently described. Above that is an area designated L 1, 2, 3, TIME OUT, which area contains time out information for loads 1, 2 and 3 as will be subsequently described. Above that are auxiliary addresses designated AUXAD 1, (ALL); AUXAD 2, (1/16); and AUXAD 3, (1/32), the contents of which addresses determines whether or not the particular MTU will be included in one of the three block addresses as was previously described. Note that the information contained in the MTU address PROM 104 is tailored by the user for each individual MTU. The programming is done by methods well known in the computer art to user requirements.

FIG. 12c depicts areas reserved in the MTU meter encoder data random access memory (RAM) 100. The area designated DCW 1 (M1) is reserved for a demand control word-meter 1, as will be subsequently described. Above that is an area designated DCW
2 (M2) which is for a demand control word-meter 2. Above that, the area designated M1 PREV, contains a pointer address for a file which is designated PREVIOUS READING FOR DEMAND METER 1. Above that is a pointer address, M2 PREV, for a file which is designated PREVIOUS READING FOR DEMAND METER 2. Above that is a pointer address, DATFIL, for a data file area which contains registers designated A through L (REGISTER A-REGISTER L) for storing readings from meters 1, 2, and 3, as well as registers for demand readings from meters 1 and 2 (DEMREG).

Referring now to FIG. 13, there is shown three selected expanded memory maps. The first FIG. 13a is an expanded memory map of the EXECUTE HENCE COMMAND FILE. As shown in FIG. 13a, the bottom of the EXECUTE HENCE COMMAND FILE is a pointer address CMDFIL which is used for ease in referencing the file. Above that are three blocks designated COMMAND 1, TIME 2 & TIME 3. These three blocks comprise one full execute hence command, with the COMMAND block containing the function code portion of the command. The most significant bit F of the command block is an active flag which indicates the existence in memory of an active command (F=1), or an empty slot (F=0). The two TIME blocks contain the bits which are included in the time field of the command.

The PRESENT READ AREA of the microprocessor internal RAM 74 has been expanded in FIG. 13b to show that above the pointer address, PRESRD, are areas reserved for readings from dials 1 through 5 of the designated meter encoder. Above these areas is an area reserved for status bits M2, M1, F3, F2, and F1. The status of the bits contained in this area signify the following: when F1, F2, and F3 equal all "ones", there is no encoder present (no ES1,2,3,). When F1, F2, F3=001, this signifies there is new demand data to M1 or M2, DEMREG at DATFIL plus M, as will be subsequently described. The M1, M2 bits signify which meter the data pertains to, with M1=0 and M2=0 signifying meter 1; M1=0 and M2=1 signifying meter 2; M1=1 and M2=0 signifying meter
3; and M1=1 and M2=1 code not used. Note also from FIG. 13c that all ones in register DCW2 or DCW1 indicate that the demand is off. Any other bit pattern signifies the demand register (DEMREG) number or meter reading register number for the selected meter encoder.

The following description pertaining to the operation of the MTU is made referencing the various flow charts shown in FIGS. 14 through 28. After the MTU has been installed and power is applied, the initializing sequence illustrated by the flow chart of FIG. 14 commences. All internal computer controls are initialized in accordance with standard initializing procedures which are well known in the computer art. A status flag bit F1, which is available for use within the microprocessor, is cleared. In the preferred embodiment, F1 is used as a minute flag as will be subsequently described in conjunction with FIG. 28. Next, computer ports 1 and 2 (P1 and P2) are initialized. Memory locations DCW1 and DCW2 are then initialized by setting all bits in each equal to "one" to indicate demand off, as previously described. Next, the EXECUTE HENCE COMMAND FILE area of the microprocess internal RAM 74 is cleared. The contents of L FLAG in the address PROM is then tested. A one in the L FLAG field signifies that all three loads should be turned on immediately. If the field contains a zero, this indicates that the process will start with all loads off, and a "load on" command is to be placed in the EXECUTE HENCE COMMAND FILE with the particular time out data which is contained in the L123 TIME OUT location of the MTU address PROM. Note that the contents of L FLAG and L123 TIME OUT are specified by the user in accordance with user's requirements as to which loads are to be turned on immediately and which are to be turned on after a specified delay period. Next, the SOMWD register is initialized. Following this, the seconds counter register (SECNT), is set equal to 60. The contents of the demand time interval register (DEMID) are then loaded into the M1DT and M2DT registers to preset the demand interval timers. Note that these timed intervals are also specified by the user and they dicate the length of the demand interval, as previously explained. Normally, each register contains a binary number which is usually about 15 minutes, with each bit representing a minute. Notice that since DEMID is an eight bit register, the demand interval can assume any length from zero minutes through 2.sup.7 -1 minutes.

Next, the one second interrupt timer is initialized and then started. The function of this timer will be described below in conjunction with the flow chart depicted in FIG. 28. Following the initialization and start of the timer, the MTU enters an idle loop (IDLOOP) which is indicated by the rectangle in FIG. 14. In IDLOOP, the receive clock (RC) signal from the receiver 40 (see FIG. 10) is tested. If RC is high (that is, if the receive clock has made a positive transition), the MTU will exit the decision block at Y and go to the receive (RECV) subroutine, the steps of which will be subsequently described in conjunction with FIG. 15. If RC is low, the minute flag F1 is tested. If F1 is equal to one, the MTU exits to the routing (ROUTNG) subroutine, the steps of which will be subsequently described in conjunction with FIG. 18. If the minute flag F1 equals zero, RC is again tested and the subsequent steps are performed as described above. This forms the idle loop which is entered after completion of other functions at the point designated "A". The MTU remains in IDLOOP while awaiting commands as will be subsequently described.

FIG. 15 depicts the steps of the method, designated RECV, by which the MTU obtains and stores the six characters, including parity, of the outbound command. As previously stated, if the receive clock (RC) is high, this indicates that an outbound message is being received; consequently, the MTU will receive the first input bit from the line carrying the outbound receive data (OBRD), at port 2 (P2) of the microprocessor 66 (see FIG. 10). RC is again tested to determine its state. Since the OBRD bits are received serially, the microprocessor 66 uses the RC clock to clock in the bits. Consequently, it will wait until RC returns low at which time it will place the received bit in the SOMWD register. The contents of SOMWD are tested against a pre-stored constant to see if they constitute a valid SOM. If not, the next step is to return to point A of IDLOOP to await RC high in order to clock in the next bit. This process is continued until all six bits of the start of message sequence are stored in SOMWD. Again the contents of SOMWD are tested to determine whether or not a valid start of message sequence was received. Assuming a valid SOM (000111 in the preferred embodiment), the contents of a character counter register are then set equal to six and the contents of a bit counter register are set equal to eight. The accumulator storage register (ACCSTR) is then cleared (the contents are set to all zeros) so that it is ready to accept the receipt of a data word. RC is then tested, to determine whether it is high or low. If low, wait until high at which time, the data bit in the OBRD signal from the receiver 40 (see FIG. 10) is placed into ACCSTR. The microprocessor then waits for RC to go low at which time it decrements the contents of the bit counter register by one. It then tests the bit counter to see if it is equal to zero. If it is not equal to zero, it continues to clock in data bits from OBRD into ACCSTR. When the bit counter is decremented to zero, one entire character of the receive command has been stored in ACCSTR. At this time, the data characters stored in ACCSTR is read into the WORK SPACE file at WRKSPS+N, for example WRKSPS+1 (see FIG. 12). At this time, the microprocessor decrements the contents of the character counter register by one then tests the character counter to see whether or not it equals zero. If the character counter is not equal to zero, the bit counter is reset at eight and the microprocessor inputs bits of the next character into ACCSTR which character is then transferred to WKSPS+2. These steps are repeated until all six characters of the inbound message (see FIG. 6) have been received and stored in locations WRKSPS+1 through WRKSPS+6. At this time, when the character count is tested, it will equal zero and the microprocessor will then perform the steps of address type (ADDTYPE) in order to determine the type of address received.

FIG. 16 depicts the steps of the method (ADDTYPE) of determining whether the command is one of the three block types, a group type or a single type, as previously described, and whether the received command is intended for this particular MTU. The microprocessor first tests bits 17 through 24 of the MTU Action Field of the received outbound command (see FIG. 5) which are stored in the (WORKSPACE) file to determine whether or not they are zero. If bits 17 through 24 are zero, this indicates that the received command is a single or group type command. At which time the microprocessor tests bit 25 to determine whether or not it is a "one". If bit 25 is not a "one", bits 1 through 3 are masked, that is, they are ignored, and bits 4 through
24 are compared with the contents of THIS MTU ADR location in the address PROM 104. If there is no match, this particular MTU has not received a valid group address and will return to point A of IDLOOP (see FIG. 14) to await further commands. If there is a match, the command contained in the function code field of the outbound command message (see FIG. 5) will be placed in the EXREG location (see FIG. 12) of the microprocessor internal RAM. The MTU will then execute the command, as will be subsequently described in conjunction with FIG. 22, after which it will return to point A of IDLOOP to await further commands.

Assuming that bit 25 was equal to one, this indicates that the address pertains to a single MTU. Consequently, the microprocessor will test received bits 1 through 24 against the contents of THIS MTU ADR in the address PROM which contains the address of this particular MTU. If bits 1 through 24 of the MTU Action Field match the contents of THIS MTU ADR, the function code portion of the received command will be placed in EXREG for execution as previously described. If there is no match, the microprocessor will return to point A of IDLOOP to await further commands.

Now assuming that bits 17 through 24 of the MTU action field of the received command are equal to zero, this indicates that the received command is a block-type. The microprocessor then tests to see if the received outbound command is legal by comparing the function code portion of the received outbound command with a prestored constant in the PROM representative of all legal function codes. If the received command is illegal, the microprocessor returns to point A of IDLOOP to await further commands.

Assuming a legal command has been received, bit 25 is tested to see if it is a "one". As previously stated, if bit 25 is a one, while bits 17 through 24 are zeros, this indicates a 1/32 level block address. On the other hand, if bits 17 through
24 are zeros and bit 25 is also a zero, this signifies either a 1/16 level MTU address or an all MTU address. Assuming that bit 25 is a zero, the microprocessor then tests to see if bits 12 through 16 are zeros. If bits 12 through 16 are zeros, the microprocessor then reads the information contained in AUXAD1, the contents of which pertain to an all MTU command, as previously described. The microprocessor then tests the contents of AUXAD1, a single bit in the preferred embodiment. If the AUXAD1
bit is zero, the microprocessor returns to point A of IDLOOP, signifying that this command was not meant for this particular MTU. If the AUXAD1 bit is a one, this command is to be executed by this particular MTU and the microprocessor then tests bits 1
through 11 of the MTU Action Field of the received command, which now represents a time as previously explained. If bits 1 through 11 are all zeros, this signifies that the command should be executed now; therefore, the command contained in the function code portion of the received command is placed in EXREG for subsequent execution as previously described. If bits 1 through 11 are not equal to zero, this indicates a command which should be executed at some time in the future (an execute hence command) whereupon the microprocessor will perform the steps of the stacker (STACKR) subroutine. The STACKR subroutine will be subsequently described in conjunction with FIG. 17.

If bits 12 through 16 of the MTU Action Field are not all zeros, the microprocessor will then read the contents of AUXAD2 since this condition is indicative of a 1/16 level MTU address. Bits 13 through 16 are then compared with the contents of AUXAD2 to determine whether or not the received command was intended for this particular MTU. If not, the microprocessor will return to point A of IDLOOP to await another command. If so, it will test the time bits 1-11 and proceed as previously described. If bit 25 was equal to one, this is indicative of a 1/32 level block address and therefore, the microprocessor will read the contents of AUXAD3 and compare it with bits 12 through 16 of the MTU Action Field of the received command to determine whether or not the received command was intended for this particular MTU. If not, the microprocessor will return to point A of IDLOOP to await a further command. If so, this means that this command was designated for this particular MTU whereupon the microprocessor will test time bits 1 through 11 and continue as previously described.

As previously stated, assume that the time bits 1 through 11 of the MTU Action Field of the received command are not equal to zero. This is indicative of an execute hence command and the microprocessor will thereupon carry out the steps of the STACKR method. These steps are shown in FIG. 17. The STACKR method is used to place the received command in the EXECUTE HENCE COMMAND FILE portion of the microprocessor internal RAM while being certain that it does not write over something that is already contained therein. Consequently, this method is used to search the EXECUTE HENCE COMMAND FILE stack to see if a command of the same type is already there. If the command is already on the stack, the new time is substituted for the old. In carrying out this method, the microprocessor will read the first command location up from the bottom of the EXECUTE HENCE COMMAND FILE stack (CMDFIL+1). It then tests the bit pattern contained in the function code field of the received command which has temporarily been placed in a WORKSPACE file register against the bit pattern of the contents of CMDFIL+1 to determine if there is a match. If they match, the active flag F of that particular register is set (see FIG. 13) and the command as well as the time bits 1 through 11 will be copied into the relevant locations of the execute hence command file (in this example CMDFIL+1, 2 & 3). This step is performed in order to write over old execute hence commands where you want to change the time of execution. Note, as previously stated, the status of the active flag bit F indicates whether or not the associated command is an active one. If it is active (F=1), it will be executed at the proper time out, whereupon the active flag will be set to zero, as will be subsequently described. After the active flag bit F has been set=1 and the command has been copied into the appropriate location in the EXECUTE HENCE COMMAND FILE, the microprocessor will return to point A of IDLOOP to await further commands.

If there was no bit pattern match, CMDFIL is incremented and the next command is read. The microprocessor will test CMDFIL+N to see if it equals TOPMEM. If not, it will again perform a bit pattern match and continue as previously described. If CMDFIL+N equals TOPMEM, CMDFIL will be initialized to its previous contents which indicate the bottom of the EXECUTE HENCE COMMAND FILE stack. The microprocessor then again reads the contents of CMDFIL+1 to determine whether or not this location is empty. To do this, the microprocessor tests to see whether the active flag bit is zero. If the active flag is a one, indicating that an active command has been stored therein, CMDFIL will be incremented by one and tested to see whether or not it equals TOPMEM. If CMDFIL+N=TOPMEM, this indicates that the microprocessor has searched the entire EXECUTE HENCE COMMAND FILE stack whereupon it returns to point A of IDLOOP to await a further command. If CMDFIL+N does not equal TOPMEM, the microprocessor will read the next higher location in the EXECUTE HENCE COMMAND FILE stack and check for an empty slot as previously described. If an empty slot is found, the microprocessor will set the active flag bit equal to one and copy the command into the empty slot then return to point A of IDLOOP to wait for the next command.

Referring to FIG. 28, there is shown a flow chart depicting the steps of a timer interrupt subroutine (TIMER INTERRUPT) which issues on internal interrupt every second. When this interrupt occurs, the microprocessor ceases what it was doing, goes immediately to the TIMER INTERRUPT subroutine, executes it, then returns to what it was previously doing. The contents of the seconds counter register (SECNT), which was initially set to sixty as previously described, will be decremented by one. The contents will then be tested to see whether or not they are equal to zero. If not equal to zero, the one second interrupt timer will be initialized and started whereupon the microprocessor will return to the method step it had been carring out previously. Assuming that the contents of SECNT have been decremented 60 times, then SECNT will equal zero (this happens once a minute since SECNT is decremented once every second). At this time, the minute flag F1 will be set equal one. The contents of M1DT (meter 1 demand interval timer) will be read, decremented by one and tested to see if the resultant equals zero. If so, the microprocessor will read the contents of DEMID (the programmed demand interval time placed in the address PROM) and place the contents in M1DT. This in effect replaces the zero contents of M1DT by the preprogrammed demand interval time, thereby effectively initializing M1DT for future use. Next, the meter 1 demand flag bit M1 in the DEMFLG register of the internal RAM is set to one (see FIG. 12). Note that when M1 of DEMFLG is set equal to one, this indicates that the end of the demand interval for that meter has occurred.

Next, the contents of M2DT (meter 2 demand interval timer) is decremented by one. The contents of M2DT are then tested to determine whether or not they equal zero. If they equal zero, the demand interval time contained in DEMID is read and placed in M2DT in a manner similar to that described for M1DT. The meter 2 demand flag bit M2 in DEMFLG is then set equal to one. Next, the contents of SECNT is set equal sixty, the one second interrupt timer is initialized and started whereupon the microprocessor returns to its previous duties.

As apparent from the preceeding description, the timer interrupt subroutine causes M1DT and M2DT, which locations contain the remaining time for execute hence commands, to be decremented once a minute. When the contents of these registers equal zero, this means that the time interval has elapsed and the associated command is to be executed as will be subsequently described. At this time, this program causes whichever of these registers which has been decremented to zero to be updated by the demand interval time information which is permanently contained in DEMID of the address PROM. Note also that the minute flag F1 is set equal to one at least once a minute by this subroutine. This indicates, referring to FIG. 14, that you must have at least one time interrupt (F1=1) in order to get out of the idle loop and execute a program instruction. Consequently, if RC is not high, and F1 equals one, indicating a timer interrupt has occurred, the microprocessor can then go to the routing (ROUTNG) subroutine.

Referring to FIG. 18, it can be seen that upon entering the ROUTNG subroutine, the microprocessor will reset the minute flag F1 equal to zero. Next, the DEMFLG register of the internal RAM will be tested to see whether or not the M1 bit equals one. In the preferred embodiment, bit 0 in the M1 bit and bit 1 is the M2 bit. If M1 equals 1, this indicates the end of a demand interval, as previously stated. Consequently, M1 will be reset to zero, and the microprocessor will read the demand control word #1 located in DCW1 and thereafter test to see whether or not meter 1 is in a demand mode. If DCW1 contains all ones, the demand is off. If the contents are not all ones, then DCW1 contains the address of the demand register (DEMREG) where a previous meter reading has been stored. In other words, if a previous demand reading was performed, DCW1 would contain the address of the DEMREG located in the meter encoder data RAM containing the previous demand reading. If meter 1 is in the demand mode, the meter number flags M1, M2 in the PRESENT READ AREA file (PRESRD+6, in the preferred embodiment as shown in FIG. 13) to meter 1 (that is, M1=0, M2=0). Whereafter, the demand read (DEMRED) subroutine will be performed as will be subsequently described in conjunction with FIG. 18. After performing DEMRED, the microprocessor will then perform the same functions with respect to meter 2 as were described above with respect to meter 1. If both M1 and M2 of DEMREG are not equal to one, this is indicative that the demand interval has not yet expired for either meter 1 or meter 2, since, as previously described, M1 equal one or M2 equal one signifies the end of the demand interval for that particular meter. At this point, the microprocessor is ready to perform the file check (FILCHK) subroutine.

Referring now to FIG. 19, there is shown the steps comprising the FILCHK subroutine. It should be noted that every time FILCHK is entered, the microprocessor executes all active commands (that is, those commands having associated time bits equal to zero); otherwise, the time bit field is decremented by one and the microprocessor returns to point A of IDLOOP. Note that since FILCHK is entered from ROUTNG which in turn is entered when the receive clock (RC) is low and F1 equals one (approximately once a minute), the microprocessor searches for active commands approximately once a minute. To perform this search and execute method, commands are read from the bottom up of the EXECUTE HENCE COMMAND FILE stack on the CMDFIL address pointer. This is performed in a manner similar to that described with respect to the STACKR subroutine. At each command location, the active flag bit F the most significant bit of the particular COMMAND register, in the EXECUTE HENCE COMMAND FILE stack (see FIG. 13), will be tested to see if it is equal to one. If the active flag bit F equals one, the contents of the time field registers (TIME) associated with that command will be decremented by one. At this time, the 11 time bits in these time field registers will be tested to see if they are all zeros. If all are equal to zero, the command is ready for execution. Consequently, the contents of the associated COMMAND register, which contains the previously stored function code portion of properly received outbound command, will be placed in the execution register (EXREG), afterwhich the execute subroutine (XECUTE) will be performed. Upon completion of the XECUTE subroutine, CMDFIL will be incremented by one in order to read the next command. CMDFIL+N will be tested to see if it equals TOPMEM. If so, the entire EXECUTE HENCE COMMAND FILE stack has been read and the microprocessor will return to point A of IDLOOP to await a further command. If not, the microprocessor will then read the next higher command in the EXECUTE HENCE COMMAND FILE stack, test for the active flag bit F status and repeat the steps previously described. Note that in addition to searching for and executing active commands having time bits equal to zero every minute, this subroutine will cause the existing time fields to be decremented by one once a minute, thereby effecting a time field countdown, one minute at a time.

Returning now to FIG. 18, it should be noted that if either DCW1 or DCW2 has been determined to be in a demand mode, it is time to perform the steps of a demand read (DEMRED) subroutine. Referring now to FIG. 20, and assuming, for purposes of simplified explanation, that DCW1 is in a demand mode, and the meter number flags M1, M2 in PRESRD+6 have been set to zeros to indicate meter 1, the steps of DEMRED will be performed for meter 1. Note that under similar circumstances, this would also be performed for meter 2 and if both are indicated, DEMRED will be performed twice, one for each meter.

To perform DEMRED, the meter number (M1, M2 flags) is retrieved from PRESRD+6 (see FIG. 13). A test is made to see if this is meter 1 (M1+M2=0). If not, it is meter 2 and the microprocessor will select port 1 (P1) and turn on the meter