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United States Patent Application
20030163298
Kind Code
A1
Odom, Brian Keith ; et al.
August 28, 2003
Reconfigurable measurement system utilizing a programmable hardware element and fixed hardware resources
Abstract
A system and method for configuring a device to perform a function, where the device includes a programmable hardware element and one or more fixed hardware resources. A program is stored which represents the function. A hardware configuration program is generated based on the program, specifying a configuration for the programmable hardware element that implements the function, and usage of the fixed hardware resources by the programmable hardware element in performing the function. A deployment program deploys the hardware configuration program onto the programmable hardware element, where, after deployment, the device is operable to perform the function, where the programmable hardware element directly performs a first portion of the function, and the programmable hardware element invokes the fixed hardware resources to perform a second portion of the function. An optional measurement module couples to the device and performs signal conditioning and/or conversion logic on an acquired signal for the device.
Inventors:
Odom; Brian Keith
(George Town, TX)
, Peck; Joseph E.
(Round Rock, TX
)
, Andrade; Hugo A.
(Austin, TX
)
, Butler; Cary Paul
(Austin, TX
)
, Truchard; James J.
(Austin, TX
)
, Petersen; Newton G.
(Austin, TX
)
, Novacek; Matthew
(Austin, TX
)
Correspondence Name and Address:
Conley, Rose, & Tayon, P.C. P.O. Box 398
Jeffrey C. Hood
Austin
TX
78767
US
Series Code:
058150
Filed:
October 29, 2001
U.S. Current Class:
703/21
U.S. Class at Publication:
703/21
Intern'l Class:
G06F 009/44
Claims
We claim:
1. A reconfigurable measurement system, comprising: a computer system comprising a processor and a memory; wherein the memory stores a measurement program, wherein the measurement program specifies a measurement function; wherein the memory also stores a program which is executable to generate a hardware configuration program based on the measurement program; and a device coupled to the computer system, wherein the device includes: a programmable hardware element, wherein the hardware configuration program is operable to be deployed onto the programmable hardware element; and one or more fixed hardware resources coupled to the programmable hardware element; wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the measurement function; wherein the hardware configuration program further specifies usage of the one or more fixed hardware resources by the programmable hardware element in performing the measurement function; and wherein, after the hardware configuration program is deployed onto the programmable hardware element, the device is operable to perform the measurement function.
2. The reconfigurable measurement system of claim 1, wherein the device being operable to perform the measurement function comprises the programmable hardware element being operable to perform the measurement function in conjunction with the one or more fixed hardware resources.
3. The reconfigurable measurement system of claim 1, wherein, after the hardware configuration program is deployed onto the programmable hardware element, the programmable hardware element is operable to: directly perform a first portion of the measurement function; and invoke the one or more fixed hardware resources to perform a second portion of the measurement function.
4. The reconfigurable measurement system of claim 3, wherein the hardware configuration program specifies: the first portion of the measurement function to be performed directly by the programmable hardware element; and usage of the one or more fixed hardware resources by the programmable hardware element to perform the second portion of the measurement function.
5. The reconfigurable measurement system of claim 1, wherein the one or more fixed hardware resources are operable to provide one or more of: a control and data path to the computer system; I/O interfacing to an external system; optimized hardware elements; and basic operating services.
6. The reconfigurable measurement system of claim 1, wherein the programmable hardware element is operable to perform one or more of: I/O interfacing, timing and triggering, inline processing, and embedded decision-making.
7. The reconfigurable measurement system of claim 1, wherein the device further comprises a processor and memory; wherein at least a portion of the measurement program is operable to be stored in the memory and executed by the processor.
8. The reconfigurable measurement system of claim 1, wherein the programmable hardware element includes a processor; wherein at least a portion of the measurement program is operable to be executed by the processor.
9. The reconfigurable measurement system of claim 1, wherein the programmable hardware element is configurable to implement a processor; wherein at least a portion of the measurement program is operable to be executed by the processor.
10. The reconfigurable measurement system of claim 1, wherein the programmable hardware element includes a reconfigurable analog portion; wherein at least a portion of the measurement program is operable to be implemented by the reconfigurable analog portion.
11. The reconfigurable measurement system of claim 10, wherein the reconfigurable analog portion comprises high-level analog components.
12. The reconfigurable measurement system of claim 10, wherein the reconfigurable analog portion comprises low-level analog components which are operable to be configured to implement high-level analog components.
13. The reconfigurable measurement system of claim 1, wherein the memory stores an application development environment for creating the measurement program.
14. The reconfigurable measurement system of claim 1, wherein the device includes one or more slots adapted to receive one or more measurement modules; wherein the device further includes a measurement module included in a slot of the device, wherein the measurement module implements a portion of the measurement function.
15. The reconfigurable measurement system of claim 1, wherein the measurement program comprises a graphical program.
16. The reconfigurable measurement system of claim 15, wherein the graphical program comprises a block diagram portion and a front panel portion; wherein the program is executable to generate a hardware configuration program based on the block diagram portion; and wherein the computer system is operable to display the front panel portion.
17. The reconfigurable measurement system of claim 1, wherein the measurement function comprises one or more of signal acquisition, signal conditioning, signal conversion, and measurement analysis.
18. The reconfigurable measurement system of claim 1, wherein the programmable hardware element is a field programmable gate array (FPGA).
19. The reconfigurable measurement system of claim 1, wherein the computer system is operable to display one or more panels on the display while the programmable hardware element in the device executes to perform the measurement function on the signal, wherein at least one of the one or more panels displays the measured signal.
20. The reconfigurable measurement system of claim 1, wherein the device includes one or more slots adapted to receive one or more measurement modules; wherein the device further includes a measurement module included in a slot of the device, wherein the measurement module implements a portion of the measurement function.
21. The reconfigurable measurement system of claim 20, wherein the measurement module includes: an input for acquiring a signal; and measurement circuitry coupled to the input, wherein the measurement circuitry is operable to perform one or more of signal conditioning and signal conversion; wherein the device is executable to perform the measurement function on an acquired signal.
22. The reconfigurable measurement system of claim 20, wherein the measurement module further includes: interface circuitry, wherein the interface circuitry is operable to provide an interface for the measurement circuitry; wherein the interface circuitry is operable to provide an interface protocol describing the interface; wherein the programmable hardware element is programmable to interface with the measurement module in accordance with the communicated interface protocol; and wherein the device is operable to perform as one or more of a measurement device and a control device.
23. The reconfigurable measurement system of claim 22, wherein the device is operable to communicate the provided interface protocol describing the interface to the computer system; and wherein the computer system is operable to program the programmable hardware element to implement the interface protocol.
24. The reconfigurable measurement system of claim 22, wherein the device is a card comprised in a slot of the computer system
25. The reconfigurable measurement system of claim 22, wherein the device is coupled to the computer system over a network
26. A reconfigurable control system, comprising: a computer system comprising a processor and a memory; wherein the memory stores a control program, wherein the control program specifies a control function; wherein the memory also stores a program which is executable to generate a hardware configuration program based on the control program; and a device coupled to the computer system, wherein the device includes: a programmable hardware element, wherein the hardware configuration program is operable to be deployed onto the programmable hardware element; one or more fixed hardware resources coupled to the programmable hardware element; wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the control function; wherein the hardware configuration program further specifies usage of the one or more fixed hardware resources by the programmable hardware element in performing the control function; and wherein, after the hardware configuration program is deployed onto the programmable hardware element, the device is operable to perform the control function.
27. The reconfigurable control system of claim 26, wherein the device being operable to perform the control function comprises the programmable hardware element being operable to perform the control function in conjunction with the one or more fixed hardware resources.
28. The reconfigurable control system of claim 26, wherein, after the hardware configuration program is deployed onto the programmable hardware element, the programmable hardware element is operable to: directly perform a first portion of the control function; and invoke the one or more fixed hardware resources to perform a second portion of the control function.
29. The reconfigurable control system of claim 28, wherein the hardware configuration program specifies: the first portion of the control function to be performed directly by the programmable hardware element; and usage of the one or more fixed hardware resources by the programmable hardware element to perform the second portion of the control function.
30. The reconfigurable control system of claim 26, wherein the one or more fixed hardware resources are operable to provide one or more of: a control and data path to the computer system; I/O interfacing to an external system; optimized hardware elements; and basic operating services.
31. The reconfigurable control system of claim 26, wherein the programmable hardware element is operable to perform one or more of: I/O interfacing, timing and triggering, inline processing, and embedded decision-making.
32. The reconfigurable control system of claim 26, wherein the device further comprises a processor and memory; and wherein at least a portion of the control program is operable to be stored in the memory and executed by the processor.
33. The reconfigurable control system of claim 26, wherein the programmable hardware element includes a processor; and wherein at least a portion of the control program is operable to be executed by the processor.
34. The reconfigurable control system of claim 26, wherein the programmable hardware element is configurable to implement a processor; and wherein at least a portion of the control program is operable to be executed by the processor.
35. The reconfigurable control system of claim 26, wherein the programmable hardware element includes a reconfigurable analog portion; and wherein at least a portion of the control program is operable to be implemented by the reconfigurable analog portion.
36. The reconfigurable control system of claim 26, wherein the reconfigurable analog portion comprises high-level analog components.
37. The reconfigurable control system of claim 26, wherein the reconfigurable analog portion comprises low-level analog components which are operable to be configured to implement high-level analog components.
38. The reconfigurable control system of claim 26, wherein the memory stores an application development environment for creating the control program.
39. The reconfigurable measurement system of claim 38, wherein the device includes one or more slots adapted to receive one or more control modules; and wherein the device further includes a control module included in a slot of the device, and wherein the control module implements a portion of the measurement function.
40. The reconfigurable control system of claim 26, wherein the control program comprises a graphical program.
41. The reconfigurable control system of claim 40, wherein the graphical program comprises a block diagram portion and a front panel portion; wherein the program is executable to generate a hardware configuration program based on the block diagram portion; wherein the computer system is operable to display the front panel portion.
42. The reconfigurable control system of claim 26, wherein the control function comprises one or more of signal acquisition, signal conditioning, signal conversion, and control analysis.
43. The reconfigurable control system of claim 26, wherein the programmable hardware element is an FPGA.
44. The reconfigurable control system of claim 26, wherein the computer system is operable to display one or more panels on the display while the programmable hardware element in the device executes to perform the control function on the signal, wherein at least one of the one or more panels displays the measured signal.
45. The reconfigurable control system of claim 26, wherein the device includes one or more slots adapted to receive one or more control modules; and wherein the device further includes a control module included in a slot of the device, wherein the control module implements a portion of the control function.
46. The reconfigurable control system of claim 26, wherein the control module includes: an input for acquiring a signal; and control circuitry coupled to the input, wherein the control circuitry is operable to perform one or more of signal conditioning and signal conversion; wherein the device is executable to perform the control function on an acquired signal.
47. The reconfigurable control system of claim 46, wherein the control module further includes: interface circuitry, wherein the interface circuitry is operable to provide an interface for the control circuitry; wherein the interface circuitry is operable to provide an interface protocol describing the interface; wherein the programmable hardware element is programmable to interface with the control module in accordance with the communicated interface protocol; and wherein the device is operable to perform as one or more of a control device and a control device.
48. The reconfigurable control system of claim 47, wherein the device is operable to communicate the provided interface protocol describing the interface to the computer system; and wherein the computer system is operable to program the programmable hardware element to implement the interface protocol.
49. The reconfigurable control system of claim 47, wherein the device is operable to communicate the provided interface protocol describing the interface to the computer system; and wherein the computer system is operable to program the programmable hardware element to implement the interface protocol.
50. The reconfigurable control system of claim 26, wherein the device is a card comprised in a slot of the computer system
51. A method for configuring a device to perform a function, wherein the device includes a programmable hardware element and one or more fixed hardware resources, the method comprising: creating a program, wherein the program represents the function; generating a hardware configuration program based on the program, wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the function, and wherein the hardware configuration program further specifies usage of the one or more fixed hardware resources by the programmable hardware element in performing the function; and configuring the programmable hardware element utilizing the hardware configuration program; wherein, after said configuring, the device is operable to perform the function; and wherein said device being operable to perform the function comprises the programmable hardware element being operable to directly perform a first portion of the function, and the programmable hardware element being operable to invoke operation of one or more of the fixed hardware resources to perform a second portion of the function.
52. The method of claim 51, wherein the device comprises a measurement device; and wherein the function comprises a measurement function.
53. The method of claim 51, wherein the device comprises a control device; and wherein the function comprises a control function.
54. The method of claim 51, further comprising: the device operating to perform the function, wherein the device operating comprises: the programmable hardware element directly performing the first portion of the function; and the programmable hardware element invoking operation of one or more of the fixed hardware resources to perform the second portion of the function.
55. The method of claim 54, wherein the device operating to perform the function comprises: the device acquiring a signal from an external source; and the programmable hardware element in the device executing to perform the function on the signal.
56. The method of claim 51, further comprising: the device acquiring a signal from an external source after said configuring; and the programmable hardware element in the device executing to perform the function on the signal.
57. The method of claim 56, wherein, in performing the function, the programmable hardware element performs one or more of: I/O interfacing, timing and triggering, inline processing, and embedded decision-making.
58. The method of claim 56, wherein the programmable hardware element in the device executing to perform the function on the signal comprises: the programmable hardware element directly performing the first portion of the function; and the programmable hardware element invoking operation of the one or more of the fixed hardware resources to perform the second portion of the function.
59. The method of claim 58, wherein the one or more fixed hardware resources performing the second portion of the function comprises one or more of: providing a control and data path from the device to the computer system; providing I/O interfacing between the device and an external system; providing optimized hardware elements for the device; and providing basic operating services for the device.
60. The method of claim 51, wherein the programmable hardware element includes a reconfigurable analog portion, the method further comprising: the reconfigurable analog portion executing a portion of the program to perform a third portion of the function.
61. The method of claim 60, wherein the reconfigurable analog portion comprises high-level analog components.
62. The method of claim 60, wherein the reconfigurable analog portion comprises low-level analog components which are operable to be configured to implement high-level analog components.
63. The method of claim 51, wherein the device further comprises a processor and memory, wherein a portion of the program is operable to be stored in the memory, the method further comprising: the processor executing said portion of the program to perform a third portion of the function.
64. The method of claim 51, wherein the programmable hardware element is configured to implement a processor, wherein the device further comprises a memory, and wherein a portion of the program is stored in the memory, the method further comprising: the implemented processor executing said portion of the program to perform a third portion of the function.
65. The method of claim 51, wherein the program comprises a graphical program.
66. The method of claim 65, wherein the graphical program comprises a block diagram portion and a front panel portion; wherein the program is executable to generate a hardware configuration program based on the block diagram portion; and wherein the computer system is operable to display the front panel portion.
67. The method of claim 51, wherein the function comprises one or more of signal acquisition, signal conditioning, signal conversion, and measurement analysis.
68. The method of claim 51, wherein the device is a small form factor device with dimensions less than about 2" by 2" by 1".
69. The method of claim 51, wherein the device includes an interface, wherein the interface comprises one or more of an Ethernet, Internet, USB, or FireWire interface.
70. The method of claim 51, wherein the device includes one or more slots adapted to receive one or more measurement modules; and wherein the device further includes a measurement module included in a slot of the device, the method further comprising: the measurement module implementing a third portion of the function.
71. The method of claim 70, wherein the measurement module includes: an input for acquiring a signal; and measurement circuitry coupled to the input, wherein the measurement circuitry is operable to perform one or more of signal conditioning and signal conversion; the method further comprising: the measurement module acquiring the signal via the input; and the measurement circuitry performing one or more of signal conditioning and signal conversion on the acquired signal, thereby producing a conditioned signal; the measurement module sending the conditioned signal to the device; and the device performing the function on the conditioned signal.
72. The method of claim 70, wherein the measurement module further includes interface circuitry for providing an interface for the measurement circuitry, the method further comprising: the interface circuitry providing an interface protocol describing said interface; and programming the programmable hardware element to interface with the measurement module in accordance with the communicated interface protocol.
73. The method of claim 72, wherein said interface protocol describing the interface is provided to a computer system coupled to the device; and wherein said programming the programmable hardware element to implement the interface protocol is performed by the computer system.
74. The method of claim 51, wherein the device is a card comprised in a slot of a computer system.
75. The method of claim 51, wherein the device is coupled to a computer system over a network.
76. The method of claim 51, further comprising: displaying one or more panels on a display while the programmable hardware element in the device executes to perform the function on the signal, wherein at least one of the one or more panels displays the measured signal.
77. The method of claim 51, wherein the programmable hardware element is an FPGA.
78. A reconfigurable measurement system, comprising: a computer system comprising a processor and a memory; wherein the memory stores a program, wherein the program specifies a function; wherein the memory also stores a program which is executable to generate a hardware configuration program based on the program; and a device coupled to the computer system, wherein the device includes: a programmable hardware element, wherein the hardware configuration program is operable to be deployed onto the programmable hardware element; and one or more fixed hardware resources coupled to the programmable hardware element; wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the function; wherein the hardware configuration program further specifies usage of the one or more fixed hardware resources by the programmable hardware element in performing the function; and wherein, after the hardware configuration program is deployed onto the programmable hardware element, the device is operable to perform the function.
79. The reconfigurable measurement system of claim 78, wherein the device being operable to perform the function comprises the programmable hardware element being operable to perform the function in conjunction with the one or more fixed hardware resources.
80. The reconfigurable measurement system of claim 78, wherein, after the hardware configuration program is deployed onto the programmable hardware element, the programmable hardware element is operable to: directly perform a first portion of the function; and invoke the one or more fixed hardware resources to perform a second portion of the function.
81. A memory medium comprising program instructions which are executable to configure a device to perform a function, wherein the device includes a programmable hardware element and one or more fixed hardware resources, wherein the memory medium stores: a program, wherein the program specifies the function; a hardware configuration program generated based on the program, wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the function, and wherein the hardware configuration program further specifies usage of the one or more fixed hardware resources by the programmable hardware element in performing the function; and a deployment program executable to deploy the hardware configuration program onto the programmable hardware element; wherein, after deployment, the device is operable to perform the function, wherein said device being operable to perform the function comprises the programmable hardware element being operable to directly perform a first portion of the function, and the programmable hardware element being operable to invoke operation of one or more of the fixed hardware resources to perform a second portion of the function.
82. The memory medium of claim 81, wherein the function comprises a measurement function; and wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the measurement function.
83. The memory medium of claim 81, wherein the function comprises a control function; and wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the control function.
84. The memory medium of claim 81, wherein the hardware configuration program comprises: a first portion which is executable in the programmable hardware element to directly perform a first portion of the function; and a second portion which is executable in the programmable hardware element to invoke operation of one or more of the fixed hardware resources to perform the second portion of the function.
85. The memory medium of claim 84, wherein the hardware configuration program is executable to receive an acquired signal from an external source and execute to perform the function on the signal.
86. The memory medium of claim 85, wherein the hardware configuration program includes functionality to perform one or more of: I/O interfacing, timing and triggering, inline processing, and embedded decision-making.
87. The memory medium of claim 85, wherein the second portion of the hardware configuration is executable to invoke one or more fixed hardware resources to provide one or more of: a control and data path from the device to the computer system; I/O interfacing between the device and an external system; optimized hardware elements for the device; and basic operating services for the device.
88. The memory medium of claim 84, wherein the hardware configuration program includes a third portion for configuring a reconfigurable analog portion in the programmable hardware element.
89. The memory medium of claim 81, wherein the device further comprises a processor and memory; wherein at least a portion of the program is operable to be stored in the memory for execution by the processor to perform a third portion of the function.
90. The memory medium of claim 81, wherein the program comprises a graphical program.
91. The memory medium of claim 90, wherein the graphical program comprises a block diagram portion and a front panel portion; wherein the deployment program is executable to generate a hardware configuration program based on the block diagram portion; and wherein the computer system is operable to display the front panel portion.
92. The memory medium of claim 81, wherein the function comprises one or more of signal acquisition, signal conditioning, signal conversion, and measurement analysis.
93. The memory medium of claim 81, wherein the device is a small form factor device with dimensions less than about 2" by 2" by 1".
94. The memory medium of claim 81, wherein the device is a card comprised in a slot of a computer system.
95. The memory medium of claim 81, wherein the device is coupled to a computer system over a network.
96. The memory medium of claim 81, further comprising: a display program for displaying one or more panels on a display while the hardware configuration executes in the programmable hardware element in the device to perform the function on an acquired signal, wherein at least one of the one or more panels displays the acquired signal.
97. The memory medium of claim 81, wherein the programmable hardware element is an FPGA.
98. A memory medium comprising program instructions which are executable to configure a device to perform a function, wherein the device includes a programmable hardware element and one or more fixed hardware resources, wherein said program instructions are executable to perform: creating a program, wherein the program implements the function; generating a hardware configuration program based on the program, wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the function, and wherein the hardware configuration program further specifies usage of the one or more fixed hardware resources by the programmable hardware element in performing the function; and deploying the hardware configuration program onto the programmable hardware element; wherein, after said deploying, the device is operable to perform the function, wherein said device being operable to perform the function comprises the programmable hardware element being operable to directly perform a first portion of the function, and the programmable hardware element being operable to invoke operation of one or more of the fixed hardware resources to perform a second portion of the function.
99. The memory medium of claim 98, wherein the function comprises a measurement function; wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the measurement function.
100. The memory medium of claim 98, wherein the function comprises a control function; wherein the hardware configuration program specifies a configuration for the programmable hardware element that implements the control function.
101. The memory medium of claim 98, wherein the hardware configuration program comprises: a first portion which is executable in the programmable hardware element to directly perform a first portion of the function; and a second portion which is executable in the programmable hardware element to invoke operation of one or more of the fixed hardware resources to perform the second portion of the function.
102. The memory medium of claim 98, wherein said program instructions are further executable to perform: receiving user input specifying the function, wherein said program is created based on the user input.
103. The memory medium of claim 98, wherein the program comprises a graphical data flow program.
104. A programmable hardware element which is configured with a hardware configuration program to perform a function, wherein the hardware configuration program comprises: a first portion which is executable in the programmable hardware element to directly perform a first portion of the function; and a second portion which is executable in the programmable hardware element to invoke operation of one or more of the fixed hardware resources to perform the second portion of the function.
105. The programmable hardware element of claim 104, wherein the hardware configuration program further includes: a third portion for configuring a reconfigurable analog portion in the programmable hardware element.
Description
FIELD OF THE INVENTION
[0001] The present invention relates to measurement and control, and particularly to measurement devices with programmable logic for performing interface, measurement, and control functions.
DESCRIPTION OF THE RELATED ART
[0002] Scientists and engineers often use measurement or instrumentation systems to perform a variety of functions, including laboratory research, process monitoring and control, data logging, analytical chemistry, test and analysis of physical phenomena, and control of mechanical or electrical machinery, to name a few examples. An instrumentation system typically includes transducers and other detecting means for providing "field" electrical signals representing a process, physical phenomena, equipment being monitored or measured, etc. Exemplary transducers include thermocouples, strain gauges, pressure sensors, microphones and cameras. As one example, detectors and/or sensors are used to sense the on/off state of power circuits, proximity switches, pushbutton switches, thermostats, relays or even the presence of positive or negative digital logic-level signals. The instrumentation system typically also includes interface hardware for receiving the measured field signals and providing them to a processing system, such as a personal computer. The processing system typically performs data analysis and presentation for appropriately analyzing and displaying the measured data.
[0003] Often, the field signals may comprise high common-mode voltages, ground loops, or voltage spikes that often occur in industrial or research environments which could damage the computer system. In that case, the instrumentation system typically includes signal conditioning circuitry, such as isolation circuitry, e.g., opto-couplers, for eliminating ground-loop problems and isolating the computer from potentially damaging voltages. Signal conditioning modules are typically provided for conditioning the raw field voltage signals by amplifying, isolating, filtering or otherwise converting the signals to appropriate signals for the computer system. In one embodiment, the analog signals are then provided to a plug-in data acquisition (DAQ) input/output (I/O) board, which is plugged into one of the I/O slots of a computer system. The DAQ board may include analog-to-digital (A/D) converters for converting the analog signals to corresponding digital signals. The computer system may have an I/O bus and connectors or slots for receiving I/O boards. Of course, other types of computer systems and I/O buses may be used to implement a processing system.
[0004] In general, measurement and control cards or devices have a particular set of resources on-board for use in measurement or control tasks, such as counters, analog to digital converters (ADC), I/O ports, filters, etc. This is especially true with respect to mass produced cards or devices, such as National Instruments MIO (Multifunction I/O) DAQ (Data Acquisition) series. These devices typically include a set of resources which meets the needs of a large majority of users. For example, a typical card may include a 16 channel multiplexed AI (analog input) in front of an A/D (analog to digital) converter, 2 analog outputs (AO), 8 digital lines, -10 timing/triggering lines, 2 general purpose counters, plus one or more timing/triggering engines.
[0005] However, in many cases the set of provided resources is a superset of those required for a particular application. In other words, for a given application there are likely to be components on the card or device which are not used. Conversely, for some applications the resources provided on the card or device may not be quite what is needed, and so either additional components may be added to the device, or a different product or device may be selected for the task. For example, a particular sensor, such as a quadrature encoder, may require extra digital logic between the sensor and a supplied counter to count not only the samples or hits of a signal, but also the direction of the signal at each hit, i.e., up or down, in order to correctly receive the signals from the sensor. In other words, there are many cases where the standard card or device provides more or less resources than required for an application or task.
[0006] In addition, in many instances it would be desirable for the user to be able to program and reprogram a measurement device to perform different functions. This
SUMMARY
[0007] Various embodiments of a system and method for measurement (including data acquisition) and/or control (including automation) operations are described. The system includes a measurement device, which may be referred to as a reconfigurable I/O (RIO) device, RIO unit, or a RIO. The RIO device may include at least one programmable hardware element which is configurable to perform a measurement and/or control function. The RIO device may also include one or more fixed hardware resources coupled to the programmable hardware element.
[0008] A typical RIO measurement system includes a computer system coupled to a RIO measurement device or unit. In one embodiment, the RIO device is a standalone device, and the RIO device may be coupled to a computer system or network solely for programming purposes. A computer system may also be coupled to the RIO device for programming and supervisory control, logging, or other types of co-processing. The RIO device may have various form factors such as a computer board or card, a PXI card, a VXI card, a standalone device, a smart sensor, a smart camera, etc.
[0009] As mentioned above, the RIO unit includes a programmable hardware element, such as a field programmable gate array (FPGA). The RIO device may also include one or more fixed hardware resources, such as counters, timers, A/D converters, signal conditioning logic, computer interface logic, etc. The RIO device may also include connectors for communicating with external components or systems, such as the computer system.
[0010] As used herein, the term "measurement device" is intended to include any of various types of devices that are operable to acquire and/or store data, and which may optionally be further operable to analyze or process the acquired or stored data. Examples of measurement devices include various types of instruments, such as oscilloscopes, multimeters, etc., as well as data acquisition devices or cards, devices external to a computer that operate similarly to data acquisition cards, smart sensors, one or more measurement modules in a chassis, and other similar types of devices.
[0011] The computer system may couple to the RIO measurement device through a serial bus, such as a USB (Universal Serial Bus) or IEEE 1394; a parallel bus such as PCI, PXI, VME, or VXI; or any other medium including a sensor bus; a network medium, such as Ethernet, a Control Area Network (CAN) or the Internet; wireless media such as IEEE 802.11
(Wireless Ethernet), Bluetooth, etc.; other serial or parallel buses, or any other transmission means. In one embodiment, the RIO measurement device may optionally also include one or more measurement modules, as well as one or more sensors or actuators which may be operable to couple to the modules and/or the RIO device and provide signals to the RIO measurement device for processing.
[0012] The host computer may comprise a CPU, a display screen, memory, and one or more input devices such as a mouse or keyboard. The host computer may operate with the RIO measurement device to analyze or measure data from the sensor/measurement device or to control the sensor and/or device. Alternatively, the computer may be used only to configure or program the RIO measurement device, i.e., the RIO unit, as described below.
[0013] In one embodiment, the computer system may store an application development environment used for creating programs. The computer system may also store a program implementing one or more measurement and/or control functions, i.e., a measurement program. The measurement program may be a graphical program implementing the one or more measurement functions. The measurement functions may perform one or more of signal acquisition, signal conditioning and conversion, control, signal analysis, signal display, and logging among others.
[0014] The computer system may be operable to execute the measurement program to perform the one or more measurement and/or control functions in conjunction with operation of the RIO and optionally one or more measurement modules and/or sensors. The measurement and control functions may include analysis of data or signals received from the RIO unit, control of RIO unit and/or measurement module operations, and user interface functions, among others.
[0015] In one embodiment, the computer system may be operable to deploy a portion or all of the measurement program (as a hardware configuration program) onto the programmable hardware element of the RIO unit. In one embodiment, the computer system may store and execute a deployment program for deploying a hardware configuration program onto a RIO unit. The RIO may then be operable to execute the hardware configuration program (corresponding to the measurement program) to perform the one or more measurement and/or control functions, possibly in conjunction with an optional measurement module and/or the computer system. During execution of the hardware configuration program by the FPGA, the FPGA may invoke or use one or more of the fixed hardware resources. The configured RIO may thus be operable to perform measurement and/or control operations. In one embodiment, the RIO may process and/or analyze the received signals, and may optionally send the results of the processing or analysis to the computer system for storage and/or further analysis. In another embodiment, the RIO may generate a control signal in response to the analysis, such as to an automation system.
[0016] In one embodiment, a RIO system may be configured to perform a function defined in a program or application, preferably a graphical program. In this embodiment, the application may first be designed e.g., in a graphical development environment, such as LabVIEW, LabVIEW FPGA, Simulink, etc., and then may be debugged in a simulation environment, described below. In the preferred embodiment, the graphical program may be developed in the G graphical programming language in the form of a graphical block diagram.
[0017] Then, the program (e.g., the graphical program) may be compiled to an FPGA hardware configuration program. In one embodiment, because of long compile times, the compiling may be performed on a client computer which is coupled to the host computer system 102 (functioning as a server) to avoid having to share the CPU resources of the host computer system. Compiling the program preferably produces an FPGA hardware configuration program which is operable to be deployed on the targeted FPGA on the RIO device.
[0018] Then, the hardware configuration program may be downloaded or deployed onto the FPGA. In one embodiment, downloading the hardware configuration program onto the FPGA may also include storing the hardware configuration program in a non-volatile memory coupled to the FPGA. The hardware configuration program may include the capability of invoking the various fixed hardware resources on the RIO device.
[0019] Finally, the deployed hardware configuration program may be executed on the FPGA to perform the functionality of the application. It is noted that in various embodiments, the FPGA may perform the functionality of the application in conjunction with the one or more fixed hardware resources comprised on the RIO with the FPGA. In other words, during execution of the hardware configuration program on the FPGA, the hardware configuration program may direct the FPGA to invoke various of the fixed hardware resources to perform particular functions. The RIO device may also operate with one or more of the host computer system, and/or one or more sensors and/or one or more measurement modules.
[0020] In one embodiment, the RIO measurement system may be configured to perform a measurement function. Performing the measurement function may include first acquiring a signal such as from a sensor or actuator, or from an external system. Then one or more of signal conditioning and signal conversion may be performed on the acquired signal, thereby generating data, e.g., results data. The signal conditioning and/or signal conversion may be performed by the RIO device, e.g., by the RIO FPGA, by the fixed hardware resources on the RIO device, or by a separate measurement module. The result data may include one or more of the original signal, the conditioned and/or converted signal, and information derived from or generated in response to the signal.
[0021] The programmable hardware element and/or the fixed hardware resource on the RIO may then perform the measurement function, e.g., on the signal or data. In other words, the RIO may perform a measurement function which was programmed into the programmable hardware element, such as filtering, pattern recognition, or other analysis. For another example, the RIO may generate control signals in response to an analysis of the data, such as to control one or more plant operations.
[0022] In another embodiment, in which the computer system comprises measurement software for performing a measurement function, the RIO unit may provide the data to the computer system. Then, the computer system may perform additional measurement functions, e.g., on the signal, where the measurement functions may include, measurement (including data acquisition) and/or control functions, as described above.
[0023] In one embodiment, a variety of digital interfaces, such as SPIbus and interfaces not known a priori, may be adapted to the resources of the RIO device.
[0024] Creation of the Graphical Program
[0025] In one embodiment, the host computer or server may store and execute a program (development program) which receives user input indicating a RIO configuration and/or task specification and generates a program, such as a graphical program, implementing the configuration and/or task. In a preferred embodiment, the development program may be a configuration wizard which is operable to lead the user through the configuration process, and to generate the graphical program, i.e., the measurement program. The wizard may utilize any of various graphical user interface (GUI) techniques to create the user-defined configuration, including drag and drop capabilities, menus, data fields, buttons, etc. For example, the wizard may provide (through the wizard GUI) a list or description of available resources such as I/O primitives, filters, counters, etc., and/or default or current values or suggested ranges for operating parameters for these resources. The user may select various of the resources and set their respective parameter values as desired.
[0026] In one embodiment, the wizard may present the available resources graphically (i.e., via icons), and may also graphically display the current configuration per the user's input. The user may drag and drop resources or components from the available resources to the current configuration diagram, and may remove resources from the configuration in the same manner. In one embodiment, the user may select, either graphically or through other means, one or more of the components in the configuration, and set timing, triggering, and/or synchronization parameters for the selected components. In another embodiment, the user may select two or more configured components and group them together, optionally giving the group a name and/or an associated icon. In this way, configured components may be organized and manipulated in a hierarchical manner. The wizard may further allow the user to add control structures such as loops and conditionals to the configuration, thereby providing higher level control functionality.
[0027] In one embodiment, the user may engage the configuration wizard on a server via a client computer system over a network, such as the Internet, i.e., using a client/server model. Client/server describes the relationship between two computer programs in which one program, the client, makes a service request from another program, the server, which fulfills the request. Although the client/server idea can be used by programs within a single computer, it is a more important idea in a network. In a network, the client/server model provides a convenient way to interconnect programs that are distributed efficiently across different locations.
[0028] In the usual client/server model, one server, sometimes called a daemon, is activated and awaits client requests. Typically, multiple client programs share the services of a common server program. Both client programs and server programs are often part of a larger program or application. In one embodiment, the client program may be a Web browser that requests services (the sending of Web pages or files) from a Web server (which technically is called a Hypertext Transport Protocol or HTTP server) in another computer somewhere on the Internet. Similarly, a computer with TCP/IP installed allows users to make client requests for files from File Transfer Protocol (FTP) servers in other computers on the Internet. The client program may provide various client functionality, such as browsing, requests for specific services (e.g., compilation), determining current configurations available, etc.
[0029] For example, in one embodiment, the client computer system may execute a client program (e.g., a browser) to connect to the host computer or server. The host computer or server may then display the wizard GUI on the client computer system display, thereby providing a mechanism for communication between the user and the wizard.
[0030] In response to the received user input, the wizard may generate the graphical program corresponding to the configuration, e.g., a LabVIEW diagram. The generated graphical program may itself be modified or edited by the user. Once the user is satisfied with the graphical program, conversion software may convert the graphical program into a hardware configuration program, as described below.
[0031] In addition, in one embodiment, the wizard may directly create a hardware configuration program through a variety of user input. The user input may include, but is not limited to, conventional hardware synthesis, selection from a library of pre-generated files, or direct implementation in an FPGA, or combinations thereof, etc.
[0032] Conversion of the Graphical Program to a Hardware Configuration Program
[0033] In one embodiment, the method may include the conversion of a graphical program, such as a graphical image processing or machine vision program, into hardware and/or software descriptions. The graphical program may comprise graphical code, such as interconnected function nodes or icons, and may use graphical data flow, graphical control flow and/or graphical execution flow constructs.
[0034] In one embodiment, programs of the present invention may create a VDiagram tree from the data structures of the graphical program. The VDiagram tree is an abstract hardware graph which represents at least a portion of the graphical program. The graph may be organized in a way that facilitates the generation of specific types of descriptions by back end programs of the present invention.
[0035] A hardware description may be generated from the abstract hardware graph by a back end program, and may be in any of various hardware description languages such as VHDL, EDIF, and Verilog. In the preferred embodiment, the hardware description comprises one or more VHDL files. A hardware netlist (preferably an FPGA-specific netlist) may be generated from the hardware description using various synthesis tools. As noted above, the term "netlist" comprises various intermediate hardware-specific description formats comprising information regarding the particular hardware elements required to implement a hardware design and the relationship among those elements. The hardware netlist is used to create or configure one or more functional hardware devices or hardware elements which are configured to execute the portion of the graphical program that is represented by the abstract hardware graph. As used herein, the term "hardware configuration program" refers to the program, bitfile, etc., which is loaded onto the programmable hardware element.
[0036] In one embodiment, the back end programs that convert the VDiagram tree to a hardware description may implement the functionality of components in the VDiagram component lists using constructs of their respective description languages. For example, a VHDL back end may create VHDL code to implement a component that performs a particular mathematical algorithm such as an exponential calculation. However, in one embodiment, such functional components are simply referenced as library components.
[0037] Thus, one embodiment of the present invention may comprise pre-compiled function blocks which implement these library components for particular hardware devices such as FPGAs. The various FPGA netlist synthesis tools used to generate an FPGA netlist from the hardware description may incorporate the pre-compiled function blocks into the FPGA netlist, and may also utilize hardware target-specific information in creating the netlist. For example, the exact form that the FPGA netlist takes may depend on the particular type of FPGA that will use the netlist, since FPGAs differ in their available resources.
[0038] An FPGA bit stream (hardware configuration program) may be generated from the FPGA netlist using readily available synthesis tools and uploaded to an FPGA. The FPGA may be comprised in a hardware device such as an interface board. After being programmed with the hardware configuration program, the FPGA is able to execute the portion of the graphical program that is exported to the hardware description. If the entire graphical program is not exported to the hardware description, then a portion of the program may execute on either a CPU implemented in the FPGA or on the general purpose CPU of the computer system. In either case, this portion of the graphical program may executed natively on the CPU, the graphical program may be converted to a text-based programming language (e.g., C) and then compiled for the CPU, or the graphical program may be compiled directly to machine language for execution on the CPU.
[0039] Where a portion of the graphical program is implemented on a CPU, the CPU may execute a real time operating system (e.g., LabVIEW RT), e.g., for performing supervisory control. In one embodiment, where the CPU couples to a display device (e.g., where the portion of the graphical program is implemented on the host CPU implemented in the host computer), then the portion that executes on the host may comprise the display portion of the program.
[0040] Simulation Environment
[0041] In one embodiment, a simulation environment, also referred to as a "Ghost" environment, may be used to test, analyze, and/or debug a hardware configuration program targeting the programmable hardware element (and one or more fixed hardware resources) comprised in a RIO system. In general, compile times for generating a hardware configuration program for an FPGA may take a lengthy time, e.g., many hours. In order to allow faster design and debugging, the "Ghost" simulation environment allows realistic simulation of a hardware configuration program in software, while still invoking the fixed hardware resources on the RIO device.
[0042] In one embodiment, as described above, the RIO system includes a programmable hardware element and one or more fixed hardware resources. The hardware configuration program may be designed to execute on the programmable hardware element and during execution the programmable hardware element may invoke various ones of the fixed hardware resources. During simulation, the programmable hardware element may be configured with a test feed-through configuration that may be optionally precompiled for the hardware target, and which may provide low level access to the fixed hardware resources on the reconfigurable board. In other words, when deployed on the programmable hardware element, the test feed-through configuration may provide for communication between the program executing on the host computer and the fixed hardware resources on the RIO device. This allows the host computer system to simulate execution of the hardware configuration program on the FPGA in software, while allowing the simulation software to invoke the actual fixed hardware resources on the RIO device, just as the FPGA would do.
[0043] In one embodiment, a set of I/O primitives, such as a set of standard LabVIEW I/O primitives, for the fixed hardware resources may be used to mediate data flow between the simulation program and the fixed hardware resources. When targeting the hardware (i.e., the programmable hardware element) these I/O primitives (possibly including standard LabVIEW primitives) may be converted into a hardware representation, such as an FPGA program file, as described above, and may take considerable time to compile. When targeting the test or simulation environment, i.e., the Ghost environment, the standard LabVIEW primitives may remain in software and run on the host computer, and thus compile very quickly. The I/O primitives may also remain in software, but redirect their functionality to the precompiled test feed-through configuration in hardware. Thus the I/O primitives executing on the host computer system can access the fixed hardware resources on the RIO device.
[0044] For example, consider a typical PID loop using an analog input and an analog output. This is commonly constructed as a while loop containing an I/O primitive for reading the analog input, the PID algorithm itself, and an I/O primitive for writing the analog output. When targeting hardware, all of these constructs may be converted to a hardware configuration program and downloaded to the FPGA on the RIO device. When targeting the Ghost environment, the precompiled test feed-through configuration may be quickly downloaded to the FPGA on the RIO device, and the while loop and PID algorithm may remain in software. As the diagram or program executes on the host, whenever an I/O primitive is called it communicates with the FPGA on the RIO device to interface to the actual hardware I/O. The test feedthrough configuration on the FPGA allows the I/O primitive to communicate through the FPGA to the fixed hardware resources.
[0045] A key advantage to this solution is that software based debugging methodologies may be used for debugging the diagram (program) while retaining connectivity to real world signals that the hardware targeted application would provide. This functionality may be provided without any changes to the user's application and may be completely transparent. Therefore, the user may debug most functional issues related to the application or system, and so may concentrate primarily on timing issues after performing a full compilation.
[0046] In one embodiment, the test feed-through configuration may be extended to utilize a micro-controller implemented or configured in the FPGA. In other words, a processor (e.g., a micro-controller) may be implemented on the FPGA, then the program may be compiled for the FPGA-implemented processor. The program may then be executed on the FPGA-implemented processor (while maintaining the original I/O capabilities of the Ghost environment). Thus any timing issues arising from sharing the processor of the host computer system may be avoided.
[0047] As indicated above, the programmable hardware element may be configured or programmed with the test feed-through configuration, which provides connectivity between the fixed hardware resources and the program executing on the computer system.
[0048] In summary, a program may be stored on a memory of the computer system. The program preferably specifies a function, e.g., a measurement function, where the program is operable to be converted into a hardware configuration program and deployed on the programmable hardware element to perform the function. In other words, as in the systems described above, the program is meant to be deployed on the programmable hardware element, after which the programmable hardware element may be operable to perform the function in conjunction with one or more fixed hardware resources, as described above. As mentioned above, deploying the program may comprise converting the program into a hardware configuration program. It is again noted that the hardware configuration program specifies usage of the one or more fixed hardware resources by the programmable hardware element (in performing the function).
[0049] In order to test the program without waiting for a lengthy compilation of the program into a hardware configuration program, the simulation environment is provided. The programmable hardware element may be configured with a test feed-through
[0050] In one embodiment, the RIO unit may comprise or be coupled to at least one measurement module which may be operable to provide connectivity to a sensor or actuator, and may be further operable to provide signal conditioning and/or signal conversion on the signal before sending the signal to the RIO unit. The RIO unit may be operable to receive interface protocol information from the measurement module specifying how to operate or interface with the measurement module. The RIO unit may then communicate the interface protocol information to the computer system. Alternatively, the measurement module may communicate the interface protocol information directly to the computer system. Based on the interface protocol information, the computer system may program or configure the programmable hardware element on the RIO unit to implement the interface as specified by the measurement module. In other words, the measurement module may tell the RIO how to "talk" with it, and the RIO may then tell the computer system how to program the RIO to communicate with the measurement module accordingly, or the measurement module may tell the computer system directly how to program the RIO. The computer system may then program the RIO unit (i.e., the programmable hardware element on the RIO unit), thereby implementing the interface specified in the interface protocol information communicated by the measurement module. This process may be referred to as initialization of the RIO/ measurement module. The configured RIO and the measurement module may then be operable to perform measurement and control operations in conjunction with the sensor and/or the computer system.
[0051] In one embodiment, the measurement module may be in the form of a measurement cartridge and the RIO unit in the form of a RIO cartridge chassis or carrier which is operable to receive one or more of the measurement cartridges. Thus, the RIO may host a plurality of measurement cartridges, each of which may provide measurement and/or control functionality for a measurement or control operation or task. The RIO may be operable to communicate with each measurement cartridge (i.e., module) and be programmed or configured (e.g., by the computer system) to implement the respective interface of each measurement cartridge. In this manner a suite of sensors may be fielded, each of which feeds signals to a respective measurement cartridge which in turn communicates through a respective interface (protocol) with the RIO cartridge carrier. The RIO cartridge carrier (i.e., the RIO) may in turn couple to a computer system. Thus, the RIO device may support a heterogeneous plurality of interfaces without having to include a heterogeneous set of interface hardware components.
[0052] Other Example Embodiments
[0053] In one embodiment, the RIO unit may be designed to couple to a host computer system, wherein the host computer system may be used for programming or configuring the RIO unit. The host computer system may also be used to operate in conjunction with the RIO unit as a co-processor during RIO execution. In another embodiment, the host computer system may be used solely for programming or configuring the RIO unit. After configuration, the RIO unit may be disconnected from the host computer system and operated as a stand-alone device. As a stand-alone device, the RIO unit may couple to various sensors, actuators, measurement modules, etc., to perform a desired measurement function. A stand-alone RIO device may also be coupled to a network to communicate with other devices, including other RIO devices. In one embodiment, a RIO device is reconfigurable to operate either as a device controlled by a computer system and as a stand-alone device with network connectivity.
[0054] In one embodiment, the RIO unit may comprise a PXI card, i.e., may be implemented on a PXI card. The PXI card may be operable to plug into a PXI chassis or a suitably equipped computer system, and may implement the RIO functionality described above. It should be noted that other card based implementations besides the PXI card implementation are also contemplated, for example, PCI, VXI, Infiniband, or other protocols or platforms may be used to implement a carrier, the PXI card embodiment being but one example.
[0055] In one embodiment, the RIO unit may comprise or be coupled to a Personal Digital Assistant (PDA). Thus the PDA may comprise the RIO unit and may include one or more slots for measurement modules. Alternatively, the RIO may be in the form of an optionally detachable RIO module, which may in turn couple to a measurement module. The measurement module may in turn be operable to couple to a sensor or actuator, as described above. In one embodiment, the PDA may be operable to program the RIO (i.e., the RIO's programmable hardware element) with the interface protocol information provided by the measurement module, as described in detail above, and may be further operable to provide functionality related to a measurement and/or control task or operation. In another embodiment, the PDA may be used as an interface to another computer system. For example, a suitably equipped PDA may provide wireless communication for the RIO/measurement module.
[0056] In one embodiment, RIO based systems may be extended with external I/O expansion, i.e., with additional I/O connections for coupling to a plurality of measurement modules. A RIO cartridge or card may provide connectors for analog I/O and/or digital I/O. The digital I/O may be coupled to an I/O expansion device, such as a breakout backplane, which may provide connectivity for a plurality of measurement module cards or cartridges, and may thereby be operable to facilitate external, synchronized, and conditioned I/O for the measurement system.
[0057] In another embodiment, the RIO card or device may couple to an addressable backplane, for example, through an SPI with slot select capabilities, and which may provide a plurality of individually addressable slots for a plurality of measurement modules or cartridges, which may each be individually targeted for communication by the carrier. Additionally, the addressable backplane may be expandable, i.e., additional addressable backplanes may be coupled to the addressable backplane to provide additional slots for additional measurement modules.
[0058] In yet another embodiment, the RIO card or device may couple to a "DAQ in the cable", where a measurement module may be comprised in a cable connector. In other words, the features of a measurement module, as described above, may be included in one or both connectors of a cable which may be coupled to the RIO device or to a sensor/actuator, as desired.
[0059] Configuration Wizard
[0060] In one embodiment of the present invention, a configuration tool may be used to configure the RIO system. For example, the configuration tool may comprise one or more programs implementing a configuration wizard. The wizard may be operable to lead a user through the configuration process, receiving user input specifying the user requirements for the system, and generating a hardware configuration program for deployment on the RIO device. In one embodiment, the configuration tool (e.g., the wizard) may also be operable to deploy the hardware configuration program onto the RIO device.
[0061] In one embodiment, operations for creation and deployment of the hardware configuration program may occur on the customer or client computer system. The client computer system may be coupled to the RIO device and may store and execute a configuration wizard program to receive user input specifying or characterizing the system configuration. The wizard may then generate the hardware configuration program and deploy the hardware configuration program onto the RIO device (i.e., the FPGA 106 in the RIO device). The advantage to this approach is that the customer does not need to be connected to a vendor server. However, if software updates are required, for example, for backend tools or third party tools used in the process, it may be necessary to request the customer to perform the updates.
[0062] In another embodiment, a vendor may operate or host the configuration wizard on a server computer system, such as an e-commerce server, which may be accessible to users (i.e., customers) over a network, e.g., the Internet. The client computer system may be coupled to a server computer system over a network, such as the Internet. The configuration wizard program may be stored and executed on the server computer. Software executing on the client computer system (e.g., a browser program) may be used to access the server (i.e., the configuration wizard). The user may thereby engage the configuration wizard remotely to specify a configuration of the RIO system, and to download or deploy the resulting hardware configuration program generated by the configuration wizard onto the RIO device. In one embodiment, the vendor server may provide sales and purchasing services to the customer in addition to system configuration.
[0063] In one embodiment, the server program (configuration wizard) may present a graphical user interface (GUI) to the user on the client computer system 102 and receive input therefrom specifying user requirements for the system to be configured.
[0064] As described above, the RIO architecture provides a reconfigurable solution for adapting or customizing a measurement product to application requirements. There are several different approaches or support levels for performing the customization, each targeting a different class of users. For example, a basic support level may include providing precompiled hardware configurations from which the user may select a solution. This approach offers the least flexibility, but simplifies the choices that the user may consider. This approach may in many ways be considered a parameterized solution, in that the pre-defined nature of the hardware resources is very structured, with well defined acquisition modes and functionality.
[0065] In contrast, another embodiment of the invention offers very little pre-defined structure. This embodiment mixes program primitives (e.g., LabVIEW primitives) with is low level I/O, and allows for the construction of timing, triggering, inline processing, and more. These building blocks can be pieced together to create the same functionality as the existing solutions, as well as much more capable operations. These blocks can often be combined in different ways to provide similar solutions, but one may be preferable to the other in terms of extensibility, resource utilization, etc. This approach offers the greatest flexibility, but requires a more sophisticated user.
[0066] In one embodiment, as mentioned above, a configuration wizard may bridge the gap between flexibility and ease of use. In one embodiment, the wizard may provide a drag and drop interface for creating the user defined RIO configuration. In another embodiment, the wizard may provide a menu and/or button based graphical interface for creating the user defined RIO configuration. In another embodiment, the wizard may provide a list of available resources, e.g., low level interface primitives such as AI, AO, and DIO, as well as a list of higher level functions that can be applied to these low-level primitives, including higher level interface functions such as counters built on top of DIO lines, or inline processing such as linearization or filtering for AI lines.
[0067] The user may select the resources required by an application, and configure any resources as necessary (for example, setting gain parameters on an analog input resource) using the configuration wizard. In one embodiment, the selections may be hierarchical, and may allow the user to add the higher level interface or inline processing in the same window. The user may then identify the timing and triggering requirements of the application, selecting from the resources identified/created in the previous step.
[0068] In each of these approaches a description file is preferably generated which uniquely identifies resources and features the user has selected. From this description file, G code (graphical code, i.e., National Instruments G graphical programming language) may be generated. HDL code may then be generated from the G code, and eventually a program binary file, i.e., a hardware configuration program, for the FPGA generated from the HDL code. In these approaches, caching schemes are preferably used so that the number of compilations may be minimized.
[0069] In one embodiment, specific features (as opposed to complete configurations) may be pre-compiled in such a way that they may be assembled or composed quickly into an appropriate configuration at the customer site. The advantage of this approach is that most of the relative placement and routing has been done up front, and so only a "quick" replacement and rerouting is needed to put the configuration together. In another embodiment of this approach, a set or library of complete configurations may be maintained and made available to the customer for a wide variety of applications. The user may select a best solution (i.e., configuration), then make modifications as needed.
[0070] Thus, in a preferred embodiment, one or more configuration wizards may generate graphical programs, e.g., LabVIEW diagrams based on customer entered requirements that are architecturally more scaleable to allow for changing customer requirements.
[0071] In one embodiment, typical applications may be grouped into a small number of classes. A wizard for each of these classes may be provided which queries the user about the application, then builds an appropriate LabVIEW diagram for the application. In one embodiment, there may be two aspects to this solution. The first is the definition of the classes and corresponding data structures. The second is the collection of wizards. In one embodiment, the wizards may use scripting, such as LabVIEW scripting, to generate the graphical programs or diagrams for each class of application.
[0072] Thus, representative diagrams of user applications, including timing, triggering, and data transfer to the host may be developed and grouped into classes. The different diagrams in a given class preferably have very similar structure. For example, a diagram for timed acquisition of analog input channels may look nearly identical to a diagram for timed acquisition of analog and digital input channels, even though it is possible to draw the diagrams very differently. A configuration wizard for each class may then be provided which may generate the appropriate graphical program in response to user input specifying a particular application or function.
[0073] In one embodiment, wizards may only include support for rudimentary functionality. In other words, wizards for basic acquisition, control loops, hardware in the loop testing, etc., may be provided. In another embodiment, the wizards may provide broad functionality in their respective areas of application. For example, in one embodiment, an acquisition wizard may only support pre- and post-triggering. In another embodiment, the acquisition wizard may also support external conversion, hardware gating, and other more advanced functionality.
[0074] Thus, the use of one or more configuration wizards may provide an easy to use interface which allows the user or customer to configure or construct custom configurations for a reconfigurable system (i.e., the programmable hardware element in a RIO system). More specifically, a wizard may provide the user access to configurable RIO functionality without the user having to be familiar with a particular development environment, such as LabVIEW.
[0075] Thus, the use of RIO devices in combination with a variety of platforms and computer systems provides a broad range of approaches for efficient and flexible measurement systems, including established platforms such as PCI/PXI and FieldPoint, USB/Ethernet devices, and small networked measurement nodes (e.g., smart sensors) for highly distributed measurement systems. Additionally, the adaptive (i.e., programmable) aspect of RIO systems in conjunction with measurement modules provides measurement and control solutions which may more accurately and efficiently match the measurement and control requirements of users. Finally, the use of graphical programs to configure the RIO hardware may greatly simply the configuration process.
BRIEF DESCRIPTION OF THE DRAWINGS
[0076] A better understanding of the present invention can be obtained when the following detailed description of the preferred embodiment is considered in conjunction with the following drawings, in which:
[0077] FIG. 1 is a block diagram of a networked RIO measurement system, according to one embodiment of the invention;
[0078] FIGS. 1A-1E illustrate various embodiments of a RIO system;
[0079] FIGS. 2A and 2B are block diagrams representative of the computer systems of FIGS. 1A, 1B, and 1C;
[0080] FIG. 3A is a block diagram illustrating a RIO card or device configured with a programmable hardware element, according to one embodiment of the present invention;
[0081] FIG. 3B is a block diagram illustrating a RIO card or device configured with a programmable hardware element and a processor and memory, according to one embodiment of the present invention;
[0082] FIG. 3C illustrates example functionality of a programmable hardware element, according to one embodiment.
[0083] FIG. 4 illustrates a RIO card, according to one embodiment of the invention;
[0084] FIG. 5A illustrates a cartridge RIO with measurement cartridges, according to one embodiment of the invention;
[0085] FIG. 5B is a block diagram of a RIO with multiple measurement modules, according to one embodiment of the invention;
[0086] FIG. 6 is a block diagram of a RIO measurement system with a measurement module, according to one embodiment of the invention;
[0087] FIG. 7 illustrates various embodiments of a RIO system with I/O expansion;
[0088] FIG. 8 illustrates RIO in the context of current measurement systems;
[0089] FIG. 9 illustrates design flow of a RIO system, according to one embodiment;
[0090] FIG. 10 is a flowchart of a method for performing a measurement function, according to one embodiment;
[0091] FIG. 11A is a flowchart of a method for configuring a measurement system, according to one embodiment;
[0092] FIG. 11B is a flowchart of embodiments of a method for performing a measurement function, according to one embodiment;
[0093] FIG. 12 illustrates the conversion of a graphical program to a hardware implementation;
[0094] FIG. 13 illustrates the conversion of a graphical program into a hardware description and the use of the hardware description to program an FPGA;
[0095] FIG. 14 is a block diagram of a RIO FPGA layout, according to one embodiment;
[0096] FIG. 15 is a block diagram of a system for debugging a reconfigurable system, according to one embodiment;
[0097] FIG. 16 is a flowchart of a method for debugging a reconfigurable system, according to one embodiment;
[0098] FIG. 17 illustrates a client/server system, according to one embodiment;
[0099] FIG. 18 is a flowchart of a method for configuring a RIO device using a configuration tool, according to one embodiment;
[0100] FIGS. 19A-19F illustrate a configuration wizard and its use, according to one embodiment;
[0101] FIG. 20 illustrates one embodiment of a block module generator;
[0102] FIG. 21 is a graphical program diagram generated by a block module generator, according to one embodiment;
[0103] FIG. 22 illustrates a resource arbitration scheme for shared resource use, according to one embodiment of the invention;
[0104] FIGS. 23A and 23B illustrate two embodiments of RIO system component responsibilities; and
[0105] FIG. 24 illustrates example application domains for the present invention with characteristic times.
[0106] While the invention is susceptible to various modifications and alternative forms specific embodiments are shown by way of example in the drawings and will herein be described in detail. It should be understood however, that drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed. But on the contrary the invention is to cover all modifications, equivalents and alternative following within the spirit and scope of the present invention as defined by the appended claims.
DETAILED DESCRIPTION OF THE EMBODIMENTS
[0107] Incorporation by Reference
[0108] The following U.S. Patents and patent applications are hereby incorporated by reference in their entirety as though fully and completely set forth herein.
[0109] U.S. Provisional Patent Application Serial No. 60/312,252 titled "A Reconfigurable I/O Measurement System" filed Aug. 14, 2001, whose inventors were Brian Keith Odom, Joseph Peck, Hugo Andrade, Cary Paul Butler, James J. Truchard, Matt Novacek and Newton Petersen
[0110] U.S. Provisional Patent Application Serial No. 60/313,136 titled "Reconfigurable Measurement System Utilizing a Programmable Hardware Element" filed Aug. 17, 2001, whose inventors were Brian Keith Odom, Joseph Peck, Hugo Andrade, Cary Paul Butler, James J. Truchard, Matt Novacek and Newton Petersen
[0111] U.S. patent application Ser. No. 09/229,695 titled "Reconfigurable Test System" filed on Jan. 13, 1999, whose inventors are Arthur Ryan, Hugo Andrade, and Brian Keith Odom, which is now U.S. Pat. No. ______.
[0112] U.S. patent application Ser. No. ______ titled "Measurement System with Modular Measurement Modules That Convey Interface Information" filed on Aug. 14, 2001, whose inventors are Perry Steger, Garritt Foote, David Potter, and James J. Truchard.
[0113] U.S. patent application Ser. No. 06/312,242 titled "System and Method for Graphically Creating, Deploying and Executing Programs in a Distributed System" filed on Aug. 14, 2001, whose inventors are Jeffrey L. Kodosky, Darshan Shah, and Steven W. Rogers.
[0114] U.S. patent application Ser. No. ______ titled "System and Method for Online Configuration of a Measurement System" filed on Aug. 15, 2001, whose inventors are Brian Sierer, Ganesh Ranganathan, Joseph Peck and Hugo Andrade.
[0115] U.S. patent application Ser. No. 09/891,571 titled "System and Method for Configuring an Instrument to Perform Measurement Functions Utilizing Conversion of Graphical Programs into Hardware Implementations" filed on Jun. 25, 2001, whose inventors are Jeffrey L. Kodosky, Hugo Andrade, Brian Keith Odom, Cary Paul Butler, and Kevin L. Schultz.
[0116] U.S. patent application Ser. No. 09/745,023 titled "System and Method for Programmatically Generating a Graphical Program in Response to Program Information," filed Dec. 20, 2000, whose inventors are Ram Kudukoli, Robert Dye, Paul F. Austin, Lothar Wenzel and Jeffrey L. Kodosky.
[0117] U.S. patent application Ser. No. 09/595,003 titled "System and Method for Automatically Generating a Graphical Program to Implement a Prototype", filed Jun. 13, 2000, whose inventors are Nicolas Vazquez, Jeffrey L. Kodosky, Ram Kudukoli, Kevin L. Schultz, Dinesh Nair, and Christophe Caltagirone.
[0118] U.S. patent application Ser. No. 09/886,455 titled "System and Method for Programmatically Generating a Graphical Program in Response to User Input", filed Jun. 20, 2001, whose inventors are Jeffrey D. Washington, Ram Kudukoli, Robert E. Dye and Paul F. Austin.
[0119] U.S. Pat. No. 4,914,568 titled "Graphical System for Modeling a Process and Associated Method," which issued on Apr. 3, 1990, whose inventors are Jeffrey L. Kodosky, James J. Truchard, and John E. MacCrisken.
[0120] U.S. Pat. No. 6,138,270 titled "System, Method and Memory Medium for Detecting Differences Between Graphical Programs," which issued on Oct. 24, 2000, and whose inventor is Ray Hsu.
[0121] U.S. Pat. No. 6,219,628 titled "System and Method for Converting Graphical Programs Into Hardware Implementations", which issued on Apr. 17, 2001, whose inventors are Jeffrey L. Kodosky, Hugo Andrade, Brian Keith Odom and Cary Paul Butler.
[0122] U.S. Pat. No. 6,173,438 titled "Embedded Graphical Programming System" filed Aug. 18, 1997, whose inventors are Jeffrey L. Kodosky, Darshan Shah, Samson DeKey, and Steve Rogers.
[0123] As used herein, the term "measurement device" is intended to include instruments, smart sensors, data acquisition devices or boards, and any of various types of devices that are operable to acquire and/or store data A measurement device may also optionally be further operable to analyze or process the acquired or stored data. Examples of a measurement device include an instrument, such as a computer-based instrument (instrument on a card) or external instrument, a data acquisition card, a device external to a computer that operates similarly to a data acquisition card, a smart sensor, one or more DAQ or measurement cards or modules in a chassis, an image acquisition device, such as an image acquisition (or machine vision) card (also called a video capture board) or smart camera, a motion control device, a robot having machine vision, and other similar types of devices. It is also contemplated that RIO technology as described herein may be used in control/automation and simulation systems.
[0124] Exemplary instruments include oscilloscopes, multimeters, spectroscopes, and any measurement, test, or automation instrument. A measurement device may be further operable to perform control functions, e.g., in response to analysis of the acquired or stored data. For example, the measurement device may send a control signal to an external system, such as a motion control system or to a sensor, in response to particular data A measurement device may also be operable to perform automation functions, i.e., may receive and analyze data, and issue automation control signals in response.
[0125] As used herein, the term "programmable hardware element" is intended to include various types of programmable hardware, reconfigurable hardware, programmable logic, or field-programmable devices (FPDs), such as one or more FPGAs (Field Programmable Gate Arrays), or one or more PLDs (Programmable Logic Devices), such as one or more Simple PLDs (SPLDs) or one or more Complex PLDs (CPLDs), or other types of programmable hardware. The programmable hardware element may also be referred to as a "reconfigurable core".
[0126] As used herein, the term "hardware configuration program" refers to any type of program, e.g., a netlist or bit file, that can be used to program or configure a programmable hardware element.
[0127] As used herein, the term "fixed hardware resources" includes hardware resources that have pre-defined functionality. Fixed hardware resources may have some programmable parameters. Examples of fixed hardware include physical I/O resources such as analog to digital converters (ADCs), digital to analog converters (DACs), and digital lines, among others. For example, in the case of a analog input comprising an ADC and a programmable gain stage, the gain parameter of the gain stage may be adjustable or configurable programmatically by the FPGA.
[0128] As used herein, the terms "data processing" and "data analysis" are used to refer to the processing of data to extract useful information from the data (such as an image) or determine characteristics of the data (or to determine characteristics of one or more objects represented by the data). The term "data processing function" may also include an operation or decision that is performed in response to the information extracted or characteristics determined from the data, i.e., a control function. The term "data processing function" is also intended to include a data processing (or control) algorithm that combines a sequence of two or more data processing functions or tools and/or decision operations that process a data in a desired way or which implement a data processing, control, or machine vision application, such as part inspection, automated assembly, data analysis, pattern matching, edge detection, alarm, logging, etc.
[0129] The term "measurement function" may include measurement and/or control functions, such as acquiring data, conditioning data, logging data, displaying data, analyzing and/or processing received data to generate a result, performing signal processing on received data, or otherwise analyzing and/or processing received data to perform a measurement. More specifically, a measurement function may include one or more of signal acquisition, signal conditioning, signal conversion, and measurement analysis. Examples of measurement functions include various instrumentation functions or control functions, including machine vision, image processing and motion control, among others.
[0130] The term "machine vision function" or "image processing function" includes tools such as edge detection, blob analysis, pattern matching, filtering, pixel transformations, and other image processing functions. The term "image processing" is used herein to refer to both "image processing" and "machine vision", to the extent these terms have different meanings.
[0131] In the present application, the term "graphical program" or "block diagram" is intended to include a program comprising graphical code, e.g., two or more nodes or icons interconnected in one or more of a data flow, control flow, or execution flow format, (and/or a "signal flow" format, which is considered a subset of data flow), where the interconnected nodes or icons may visually indicate the functionality of the program. Thus the terms "graphical program" or "block diagram" are each intended to include a program comprising a plurality of interconnected nodes or icons which visually indicate the functionality of the program. A graphical program may comprise a block diagram and may also include a user interface portion or front panel portion. The user interface portion may be contained in the block diagram or may be contained in one or more separate panels or windows. A graphical program may be created using any of various types of systems which are used to develop or create graphical code or graphical programs, including LabVIEW, DASYLab, and DiaDem from National Instruments, Agilent VEE (Visual Engineering Environment), Snap-Master by HEM Data Corporation, SoftWIRE from Measurement Computing, ObjectBench by SES (Scientific and Engineering Software), Simulink from The MathWorks, WiT from Coreco, Vision Program Manager from PPT Vision, Hypersignal, VisiDAQ, VisSim, and Khoros, among others. In the preferred embodiment, the system uses the LabVIEW graphical programming system available from National Instruments. Thus, in one embodiment, development tools typically used for software development may be used to configure hardware, i.e., the programmable hardware element.
[0132] In the present application, the term "program" may include a graphical program as described herein, a program developed in a textual-based programming language, such as C, C++, Basic, Fortran, Pascal, Java, etc., and programs developed in hardware description languages, such as VHDL, Verilog, or system description languages, such as SystemC.
[0133] In the present application, the term "measurement program" may include a program that performs a measurement function as described herein.
[0134] As used herein, the term "memory medium" includes a non-volatile medium, e.g., a magnetic media or hard disk, or optical storage; a volatile medium, such as computer system memory, e.g., random access memory (RAM) such as DRAM, SRAM, EDO RAM, RAMBUS RAM, DR DRAM, etc.; or an installation medium, such as a CD-ROM or floppy disks 104, on which the computer programs according to the present invention may be stored for loading into the computer system. The term "memory medium" may also include other types of memory or combinations thereof
[0135] As used herein, the term "processor" includes a CPU (microprocessor or microcontroller), DSP, reconfigurable processor, or a hardcore or softcore inside an FPGA.
[0136] RIO Overview
[0137] The Reconfigurable Input/Output (RIO) architecture may be considered a template or pattern/platform for a reconfigurable measurement (including data acquisition), control (including automation) and/or simulation system, in which software and hardware components, as well as configuration and runtime behaviors, are defined. As used herein, the term "reconfigurable I/O" or "RIO" refers to a device, (e.g., a card) which includes at least one programmable hardware element. In simple terms, a RIO card or unit contains at least one programmable hardware element, i.e., a reconfigurable core, such as a field programmable gate array (FPGA), which may be surrounded by fixed hardware resources (e.g., I/O resources) (both on-board and off-board, e.g. measurement modules). The behavior of the reconfigurable core can be configured to better match the requirements of the measurement and/or control system. In an exemplary embodiment, the system may be implemented as an FPGA that is targeted by a development system, such as National Instruments LabVIEW or LabVIEW FPGA. Other embodiments are also contemplated, e.g., an embodiment which includes an addition of a microprocessor to the FPGA core.
[0138] Thus, the reconfigurable core (programmable hardware element) is the basis for RIO. This scaleable resource may include such functions as I/O interfacing, timing and triggering, inline processing, and embedded decision-making. Fixed hardware resources may be connected at the boundary of the reconfigurable core, and may typically provide one of four types of functionality:
[0139] 1) a control and data path to a host computer;
[0140] 2) an I/O interface to external systems;
[0141] 3) optimized hardware elements; and
[0142] 4) basic operating services.
[0143] These resources by themselves may not define the measurement and/or control system, but rather are the low-level building blocks for the creation of the system. The configuration or program (the hardware configuration program) in the reconfigurable core (e.g., the FPGA) builds on these blocks to define the system.
[0144] The interface at the boundary of the reconfigurable core provides RIO with a very flexible mechanism for connecting to the fixed resources. The fundamental interface at this boundary may comprise digital and/or analog pins, and the ability of RIO to organize and build on these pins in a hierarchical method is an important capability. RIO allows pins to be grouped into ports that perform specific interfacing functionality. For example, 4 digital pins may be associated with a fixed serial ADC, and together may be considered an interface port. A simpler example is a single digital pin defined as a 1-bit DIO port. The grouping at this level defines the most basic interface to each of the fixed resources.
[0145] These low-level ports can be further grouped to provide more advanced functionality. This functionality may include the creation of higher capability interfacing logic, such as counters built on top of several individual DIO ports, or the addition of logic to an interface, such as a digital filter placed inline with an ADC interface. This hierarchy of groups is not limited to one level, and may be arbitrarily deep.
[0146] It is important to note that RIO is not limited to digital only solutions. Other embodiments include reconfigurable digital and analog circuitry. The grouping and connecting of "logic" in the FPGA may also include reconfigurable analog building blocks that can be configured to perform user defined analog functionality, such as, for example, an uncommon ADC with 11 bits of resolution with an integrated analog low pass filter.
[0147] The concept of grouping pins also applies to communication mechanisms for RIO, such as for communicating with a host computer. The low-level grouping defines a physical interface which may connect to buses or interface chips implementing PC, USB, IEEE-1394, Ethernet, etc. The creation of read and write registers on top of the physical interface may implement the actual communication. The use of these registers is application dependent, but their method of access may be generic.
[0148] Control and data paths (1) and the I/O interface (2) above are very similar in concept, but specific to the type of interface they are implementing and communicating with. As described in 3) above, communication paths may take advantage of optimized hardware elements. For example, to communicate with the host a hardwired PCI interface (e.g., National Instruments minMITE) may be utilized. If extraordinary FFT performance is desired or required, application specific integrated circuits (ASICs), specialized DSPs, or other FPGAs implementing Fast Fourier Transforms (FFT) may be used.
[0149] The operating services of 4) above may refer to external (or internal) blocks that provide basic services to the reconfigurable core, e.g., a basic clock reference (internal and external (system)), a reconfiguration path (from host or persistent store), and a persistent store. It can also include basic standard debugging interfaces, and connectivity to RAM, among other services.
[0150] In addition to the creation of user specific I/O interfaces, RIO may provide for the timing and triggering of these interfaces, allowing for very flexible relationships between resources. For example, the user may configure one group of I/O to be sampled at one rate, and another group at a completely independent rate. This same flexibility may apply to starting, stopping, pausing, etc. of I/O operations.
[0151] Another possible use of the reconfigurable core is to provide processing. The inclusion of decision making capabilities in the hardware may be useful at all levels of the measurement and/or control system. For example, decision logic on the programmable hardware element may be used to transform signals, such as converting quadrature signals into count and up/down controls for a counter, for inline processing, such as adding linearization to an analog input data stream, for creating complicated trigger sequences, such as state based triggering for bus analyzers, and for high-speed control loops, such as PID. This decision-making capability may provide wide flexibility to many applications, and in some cases may allow the application to run autonomously in the FPGA without any host computer interaction.
[0152] Yet another possible use of the programmable hardware element is to implement any of a variety of interfaces for communicating with a measurement module. In other words, the RIO device may be operable to be programmed with an interface protocol which is specific to a given measurement module. In addition, this programming may occur dynamically and/or automatically, such as upon connection to the module. These and other embodiments of the invention are described in detail below.
[0153] A RIO device as described herein may be capable of being configured or programmed (in hardware) to perform any of a variety of measurement, control, and/or simulation tasks, i.e., to assume the properties in hardware of various devices or configurations of devices, as well as measurement and/or control functions. A RIO device may be used to perform any of various types of hardware operations in any of various applications.
[0154] Exemplary applications targeted by RIO include, but are not limited to, measurement and data acquisition, embedded I/O and machine control, high-speed analog control loops, high density discrete control, hardware in the loop simulation, and applications requiring custom hardware triggering and/or digital logic, among others. In general, RIO may be particularly suitable for developing simple hardware functionality which is difficult to express in fixed hardware resources, including complex triggering, quadrature encoding, simple bit transfers, and the like, as well as hardware based interlocks, simple control algorithms, e.g., PID (proportional integral derivative), and simple measurements, DSP, rise time, fall time, RMS (root mean square), FIR (finite impulse response) filters, and period measurement, among others, although it is noted that RIO may be used for any other hardware development as well.
[0155] FIG. 1--Block Diagram of a RIO Measurement System
[0156] FIG. 1 is a block diagram of a RIO measurement system, according to an embodiment of the invention. As FIG. 1 shows, sensor 112 may optionally be coupled to a measurement module 108, described above, which may in turn be coupled to a RIO unit or RIO device, also referred to as a RIO 110. The RIO 110 may be coupled to computer system 102 via transmission medium 104, e.g., the Internet. Alternatively, the sensor 112 may couple directly to the RIO device 110, and measurement module 108
may not be included.
[0157] In the embodiment where the sensor 112 couples directly to the RIO device 110 (i.e., where there is no measurement module), the RIO device 110 may be operable to perform any necessary signal conditioning and/or signal conversion on the signals sent by the sensor 112. Alternatively, signal conditioning and/or signal conversion may not be necessary. The RIO device 110 may then perform analysis or other data processing on the signals, and send results of the analysis to the computer system 102 or another device. The RIO device 110 may also perform analysis and generate real time control signals to a process or system being controlled.
[0158] The measurement module 108 and the RIO unit (carrier) 110 together may provide the functionality of the RIO measurement device 110 of FIG. 1. For example, in one embodiment, the measurement module 108 may be operable to perform signal conditioning and/or signal conversion on the signals sent by the sensor 112, and to transmit results of such processing on to the RIO 110. In this embodiment, the measurement module 108 may include one or more fixed hardware resources used by the programmable hardware element on the RIO 110. In one embodiment, the RIO 110 may be operable to receive data from the measurement module 108, perform a function on the data, and communicate the data (possibly in a different format or form) to the computer system 102, e.g., over the transmission medium 104. For example, the RIO 110 may receive signal data in a proprietary format from the measurement module 108 and format the data for transmission over wireless Ethernet to the computer system 102.
[0159] The host computer 102 may comprise a CPU, a display screen, memory, and one or more input devices such as a mouse or keyboard as shown. The computer 102 may be used to configure or program the RIO measurement device 110, as described below.
[0160] Additionally, the computer 102 may operate with the measurement device 110 to analyze or measure data from the sensor 112 and/or measurement device 110 or to control the sensor 112 and/or measurement device 110.
[0161] In one embodiment, the computer system 102 may store an application development environment (ADE) for creating programs. The ADE may include specific functionality for creating programs that are to be deployed on a RIO device 110. The ADE may also include specific functionality for a certain type of application, such as measurement, control, or automation, among others.
[0162] The computer system may also store a program implementing a function. For example, the computer system may store a program implementing one or more measurement functions, i.e., a measurement program, e.g., a program, such as a graphical program, implementing the one or more measurement functions.
[0163] The computer system 102 may be operable to execute the measurement program to perform the one or more measurement functions, preferably in conjunction with operation of the RIO 110 and/or measurement module 108. For example, the measurement program may be executable to perform one or more measurement and/or control functions, including analysis of data or signals received from the RIO 110, control of RIO and/or measurement module operations, user interface functions, and pattern recognition and/or characterization, among others.
[0164] The computer system 102 may store a deployment program which is executable to generate a hardware configuration program based on a program generated by the ADE. The deployment program may be part of the ADE. The deployment program may also be executable to transfer or deploy the hardware configuration program onto a programmable hardware element (or multiple programmable hardware elements) of a RIO device 110.
[0165] In the preferred embodiment, the RIO 110 includes at least one programmable hardware element 106, which may be programmed by computer system 102. In one embodiment, the RIO 110 may include a plurality of programmable hardware elements 106. The computer system 102 may also couple to multiple RIO units 110, wherein each RIO unit 110 includes one or more programmable hardware elements 106. For example, the computer system 102 may couple to multiple RIO units 110, wherein the RIO units 110 may be distributed in various locations on a network (such as the Internet).
[0166] Where the RIO unit 110 includes a plurality of programmable hardware elements 106, the computer system 102 may be operable to transfer or deploy a hardware configuration program onto one or more (or all) of the plurality of programmable hardware elements of the RIO device 110. Thus the hardware configuration program may be generated and/or deployed in a manner to distribute the hardware configuration program across multiple programmable hardware elements 106. The hardware configuration program may also be generated and/or deployed in a manner to distribute the hardware configuration program across multiple RIO devices 110, wherein each RIO device may include one or more programmable hardware elements 106.
[0167] In one embodiment, the RIO device 110 may include one or more fixed hardware resources 204. Fixed hardware resources 204 may also be located external to the RIO device 110, such as the measurement module 108, or on the sensor 112. A deployed hardware configuration program on the RIO device 110 may be operable to invoke functionality of one or more of the hardware