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| Patent ID | Title | Date Filed |
| 7210115 | Methods for optimizing programmable logic device performance by reducing congestion
| July 2, 2004 |
| 7210111 | Systems and methods for conducting future signal checks
| May 4, 2004 |
| 7207027 | Algorithmic and dataflow graphical representation of MATLAB
| December 23, 2004 |
| 7207026 | Memory tiling architecture
| November 16, 2004 |
| 7207020 | Method and apparatus for utilizing long-path and short-path timing constraints in an electronic-design-automation tool
| February 9, 2004 |
| 7206730 | HDL preprocessor
| April 11, 2001 |
| 7203922 | Merging of infrastructure within a development environment
| June 1, 2004 |
| 7203915 | Method for retiming in the presence of verification constraints
| March 10, 2005 |
| 7203633 | Method and system for selectively storing and retrieving simulation data utilizing keywords
| February 13, 2003 |
| 7203632 | HDL co-simulation in a high-level modeling system
| March 14, 2003 |
| 7200824 | Performance/power mapping of a die
| November 16, 2004 |
| 7200544 | Systems for selectively disabling timing violations in hardware description language models of integrated circuits and methods of operating the same
| October 26, 2001 |
| 7197733 | Integrated circuit dynamic parameter management in response to dynamic energy evaluation
| July 11, 2006 |
| 7197732 | Layout-driven, area-constrained design optimization
| August 22, 2005 |
| 7197730 | Reducing time to design integrated circuits including performing electro-migration check
| October 5, 2005 |
| 7194724 | High level synthesis method and high level synthesis apparatus
| November 16, 2004 |
| 7194722 | Cost-independent critically-based target location selection for combinatorial optimization
| December 9, 2004 |
| 7194721 | Cost-independent criticality-based move selection for simulated annealing
| June 15, 2004 |
| 7194713 | Logic verification device, logic verification method, and computer product
| December 22, 2004 |
| 7194705 | Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions
| March 14, 2003 |
| 7191427 | Method for mapping a logic circuit to a programmable look up table (LUT)
| April 23, 2004 |
| 7191426 | Method and apparatus for performing incremental compilation on field programmable gate arrays
| September 1, 2004 |
| 7191113 | Method and system for short-circuit current modeling in CMOS integrated circuits
| December 17, 2002 |
| 7188330 | Handling of unused coreware with embedded boundary scan chains to avoid the need of a boundary scan synthesis tool during custom instance creation
| May 18, 2004 |
| 7185309 | Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip
| January 30, 2004 |
| 7185308 | Correlation of behavioral HDL signals
| March 7, 2003 |
| 7181720 | Process and device for circuit design by means of high-level synthesis
| May 28, 2004 |
| 7181719 | Graphic acquisition method for placement of signal processing applications
| August 31, 2001 |
| 7181715 | Method and system for supporting circuit design for products
| July 1, 2004 |
| 7181704 | Method and system for designing integrated circuits using implementation directives
| August 6, 2004 |
| 7181703 | Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage
| July 22, 2003 |
| 7178116 | Method and device for designing semiconductor integrated circuit and logic design program
| October 20, 2004 |
| 7178112 | Management of functions for block diagrams
| April 16, 2003 |
| 7174531 | Creating photolithographic masks
| March 26, 2004 |
| 7174530 | System and method of design for testability
| May 14, 2003 |
| 7171644 | Implementation set-based guide engine and method of implementing a circuit design
| August 6, 2004 |
| 7171643 | System LSI design support apparatus and a system LSI design support method
| February 27, 2004 |
| 7171636 | Pass-transistor logic circuit and a method of designing thereof
| May 9, 2003 |
| 7171634 | Processing and verifying retimed sequential elements in a circuit design
| June 28, 2004 |
| 7171633 | Estimating quality during early synthesis
| December 12, 2003 |
| 7171632 | Apparatus, method and program for designing semiconductor integrated circuit
| May 24, 2004 |
| 7171631 | Method and apparatus for jump control in a pipelined processor
| April 21, 2003 |
| 7171346 | Mismatch modeling tool
| September 1, 2000 |
| 7168061 | Method, system and program product for implementing a read-only dial in a configuration database of a digital design
| April 28, 2003 |
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