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| Patent ID | Title | Date Filed |
| 6934896 | Time shift circuit for functional and AC parametric test
| December 31, 2001 |
| 6922650 | Semiconductor device tester and its method
| July 8, 2003 |
| 6920003 | Data storage reading device and method
| August 2, 2002 |
| 6893973 | Method of etching silicon nitride film and method of producing semiconductor device
| April 3, 2003 |
| 6879927 | Communication interface for virtual IC tester
| July 21, 2003 |
| 6865707 | Test data generator
| April 1, 2002 |
| 6859899 | Method for data packet acquisition using split preamble
| May 15, 2001 |
| 6839397 | Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits
| July 18, 2001 |
| 6836503 | Apparatus for data recovery in a synchronous chip-to-chip system
| January 28, 2003 |
| 6829728 | Full-speed BIST controller for testing embedded synchronous memories
| March 5, 2001 |
| 6819140 | Self-synchronous logic circuit having test function and method of testing self-synchronous logic circuit
| May 30, 2003 |
| 6802034 | Test pattern generation circuit and method for use with self-diagnostic circuit
| January 31, 2002 |
| 6800817 | Semiconductor component for connection to a test system
| January 23, 2002 |
| 6789224 | Method and apparatus for testing semiconductor devices
| January 16, 2001 |
| 6789219 | Arrangement and method of testing an integrated circuit
| August 7, 2001 |
| 6785858 | Semiconductor device capable of adjusting timing of input waveform by tester with high accuracy
| February 1, 2001 |
| 6785855 | Implementation of an assertion check in ATPG models
| November 13, 2001 |
| 6772382 | Driver for integrated circuit chip tester
| May 2, 2001 |
| 6754869 | Method and device for testing set-up time and hold time of signals of a circuit with clocked data transfer
| July 19, 2001 |
| 6754868 | Semiconductor test system having double data rate pin scrambling
| June 29, 2001 |
| 6744272 | Test circuit
| March 18, 2002 |
| 6735732 | Clock adjusting method and circuit device
| June 13, 2003 |
| 6732305 | Test interface for verification of high speed embedded synchronous dynamic random access memory (SDRAM) circuitry
| May 4, 2001 |
| 6728917 | Sequential test pattern generation using combinational techniques
| February 9, 2001 |
| 6728516 | Data transmission method by radiocommunication channel
| April 3, 2000 |
| 6715119 | Test data generating system and method to test high-speed actual operation
| July 7, 2000 |
| 6708139 | Method and apparatus for measuring the quality of delay test patterns
| April 30, 2002 |
| 6704893 | Method for testing integrated circuits with an automatic test equipment
| August 15, 2000 |
| 6691272 | Testing of high speed DDR interface using single clock edge triggered tester data
| December 12, 2000 |
| 6691267 | Technique to test an integrated circuit using fewer pins
| June 9, 1998 |
| 6675339 | Single platform electronic tester
| August 22, 2001 |
| 6671848 | Test circuit for exposing higher order speed paths
| March 20, 2001 |
| 6671847 | I/O device testing method and apparatus
| November 8, 2000 |
| 6671842 | Asynchronous bist for embedded multiport memories
| October 21, 1999 |
| 6647523 | Method for generating expect data from a captured bit pattern, and memory device using same
| October 9, 2002 |
| 6647507 | Method for improving a timing margin in an integrated circuit by setting a relative phase of receive/transmit and distributed clock signals
| December 31, 1999 |
| 6636999 | Clock adjusting method and circuit device
| March 29, 2000 |
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