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| Patent ID | Title | Date Filed |
| 6950046 | IC with built-in self-test and design method thereof
| July 20, 2004 |
| 6949947 | Test mode circuit of semiconductor device
| December 23, 2003 |
| 6948097 | Semiconductor device including function verification capability
| January 14, 2002 |
| 6934899 | Variable self-time scheme for write recovery by low speed tester
| January 30, 2002 |
| 6927603 | Semiconductor integrated circuit having system bus divided in stages
| August 4, 2003 |
| 6925591 | Method and apparatus for providing full accessibility to instruction cache and microcode ROM
| May 21, 2004 |
| 6910164 | High-resistance contact detection test mode
| August 9, 2001 |
| 6898747 | Method for testing circuit units to be tested with increased data compression for burn-in
| August 30, 2002 |
| 6895537 | Semiconductor integrated circuit device including semiconductor memory with tester circuit capable of analyzing redundancy repair
| February 27, 2001 |
| 6874112 | Fault coverage and simplified test pattern generation for integrated circuits
| January 28, 2002 |
| 6868545 | Method for re-using system-on-chip verification software in an operating system
| January 31, 2000 |
| 6858447 | Method for testing semiconductor chips
| May 21, 2002 |
| 6834366 | Method of outputting internal information through test pin of semiconductor memory and output circuit thereof
| September 21, 2001 |
| 6829730 | Method of designing circuit having multiple test access ports, circuit produced thereby and method of using same
| April 27, 2001 |
| 6822435 | Comparator circuit for differential swing comparison and common-mode voltage comparison
| January 24, 2002 |
| 6802046 | Time domain measurement systems and methods
| May 1, 2002 |
| 6795943 | Semiconductor device with test mode
| October 11, 2001 |
| 6789221 | Integrated circuit with self-test circuit
| August 3, 2001 |
| 6785856 | Internal self-test circuit for a memory array
| December 7, 2000 |
| 6782336 | Test outputs using an idle bus
| September 17, 2001 |
| 6775811 | Chip design method for designing integrated circuit chips with embedded memories
| May 22, 2002 |
| 6760904 | Apparatus and methods for translating test vectors
| September 2, 1999 |
| 6757844 | Architecture and logic to control a device without a JTAG port through a device with a JTAG port
| October 25, 2000 |
| 6754868 | Semiconductor test system having double data rate pin scrambling
| June 29, 2001 |
| 6738921 | Clock controller for AC self-test timing analysis of logic system
| March 20, 2001 |
| 6721914 | Diagnosis of combinational logic circuit failures
| April 6, 2001 |
| 6721913 | Method and apparatus for testing an interface between separate hardware components
| July 12, 2000 |
| 6718496 | Self-repairing semiconductor device having a testing unit for testing under various operating conditions
| March 17, 2000 |
| 6715105 | Method for reducing stored patterns for IC test by embedding built-in-self-test circuitry for chip logic into a scan test access port
| November 14, 2000 |
| 6711706 | Method and apparatus for elastic shorts testing, a hardware-assisted wire test mechanism
| December 20, 2000 |
| 6700581 | In-circuit test using scan chains
| March 1, 2002 |
| 6690189 | Apparatus and method for testing semiconductor integrated circuit
| August 13, 2001 |
| 6684357 | Chip testing apparatus and method
| December 13, 2000 |
| 6675337 | Built-in self verification circuit for system chip design
| August 2, 2000 |
| 6665826 | Method and apparatus for testing the timing of integrated circuits
| June 8, 2001 |
| 6665628 | Methods for embedding and de-embedding balanced networks
| January 15, 2002 |
| 6658617 | Handling a 1-hot multiplexer during built-in self-testing of logic
| May 11, 2000 |
| 6651201 | Programmable memory built-in self-test combining microcode and finite state machine self-test
| July 26, 2000 |
| 6651196 | Semiconductor device having test mode entry circuit
| February 15, 2000 |
| 6647524 | Built-in-self-test circuit for RAMBUS direct RDRAM
| April 30, 1999 |
| 6647511 | Reconfigurable datapath for processor debug functions
| August 24, 1999 |
| 6640323 | Testing system for evaluating integrated circuits, a testing system, and a method for testing an integrated circuit
| October 25, 2002 |
| 6629282 | Module based flexible semiconductor test system
| November 5, 1999 |
| 6622274 | Method of micro-architectural implementation on bist fronted state machine utilizing `death logic` state transition for area minimization
| September 5, 2000 |
| 6617869 | Electrical circuit with a testing device for testing the quality of electronic connections in the electrical circuit
| August 11, 2000 |
| 6581174 | On-chip testing circuit and method for integrated circuits
| August 31, 2001 |
| 6581172 | On-board testing circuit and method for improving testing of integrated circuits
| January 16, 2001 |
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