| 1 2 3 |
| Patent ID | Title | Date Filed |
| 6920595 | Skewed latch flip-flop with embedded scan function
| March 30, 2001 |
| 6909274 | Signal pin tester for AC defects in integrated circuits
| April 21, 2003 |
| 6904553 | Deterministic testing of edge-triggered logic
| September 26, 2000 |
| 6903582 | Integrated circuit timing debug apparatus and method
| October 9, 2003 |
| 6901544 | Scan chain testing of integrated circuits with hard-cores
| October 24, 2001 |
| 6901543 | Utilizing slow ASIC logic BIST to preserve timing integrity across timing domains
| October 12, 2001 |
| 6883127 | Comparison circuit and method for verification of scan data
| June 28, 2001 |
| 6879927 | Communication interface for virtual IC tester
| July 21, 2003 |
| 6877123 | Scan clock circuit and method therefor
| December 19, 2001 |
| 6877121 | Boundary scan cell for testing AC coupled line using phase modulation technique
| July 19, 2001 |
| 6865705 | Semiconductor integrated circuit device capable of switching mode for trimming internal circuitry through JTAG boundary scan method
| February 7, 2003 |
| 6859899 | Method for data packet acquisition using split preamble
| May 15, 2001 |
| 6839397 | Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits
| July 18, 2001 |
| 6836503 | Apparatus for data recovery in a synchronous chip-to-chip system
| January 28, 2003 |
| 6832327 | Apparatus and method for providing an external clock from a circuit in sleep mode in a processor-based system
| October 2, 2001 |
| 6820227 | Method and apparatus for performing error checking
| November 15, 2001 |
| 6804764 | Write clock and data window tuning based on rank select
| January 22, 2002 |
| 6785858 | Semiconductor device capable of adjusting timing of input waveform by tester with high accuracy
| February 1, 2001 |
| 6785855 | Implementation of an assertion check in ATPG models
| November 13, 2001 |
| 6782502 | Combinational test pattern generation method and apparatus
| October 1, 2002 |
| 6779144 | Semiconductor integrated circuit device and method of testing it
| November 30, 2001 |
| 6775797 | Method of testing an integrated circuit having a flexible timing control
| August 7, 2001 |
| 6775637 | Test method and apparatus for source synchronous signals
| May 15, 2003 |
| 6763489 | Method for scan testing of digital circuit, digital circuit for use therewith and program product for incorporating test methodology into circuit description
| February 2, 2001 |
| 6754869 | Method and device for testing set-up time and hold time of signals of a circuit with clocked data transfer
| July 19, 2001 |
| 6754171 | Method and system for distributed clock failure protection in a packet switched network
| May 18, 2000 |
| 6748565 | System and method for adjusting timing parts
| October 2, 2000 |
| 6745357 | Dynamic logic scan gate method and apparatus
| July 9, 2001 |
| 6742151 | Semiconductor integrated circuit device with scan signal converting circuit
| January 8, 2001 |
| 6738921 | Clock controller for AC self-test timing analysis of logic system
| March 20, 2001 |
| 6732305 | Test interface for verification of high speed embedded synchronous dynamic random access memory (SDRAM) circuitry
| May 4, 2001 |
| 6725406 | Method and apparatus for failure detection utilizing functional test vectors and scan mode
| January 9, 2001 |
| 6725391 | Clock modes for a debug port with on the fly clock switching
| December 19, 2000 |
| 6701476 | Test access mechanism for supporting a configurable built-in self-test circuit and method thereof
| May 29, 2001 |
| 6693436 | Method and apparatus for testing an integrated circuit having an output-to-output relative signal
| December 23, 1999 |
| 6681192 | Systems and methods for fast timer calibration
| September 24, 2001 |
| 6678847 | Real time function view system and method
| April 30, 1999 |
| 6671847 | I/O device testing method and apparatus
| November 8, 2000 |
| 6665807 | Information processing apparatus
| September 3, 1999 |
| 6662305 | Fast re-synchronization of independent domain clocks after powerdown to enable fast system start-up
| November 23, 1999 |
| 6651200 | Method and apparatus for adaptive clocking for boundary scan testing and device programming
| June 4, 1999 |
| 6651199 | In-system programmable flash memory device with trigger circuit for generating limited duration program instruction
| June 22, 2000 |
| 6636100 | Can controller and one-chip computer having a built-in can controller
| November 29, 1999 |
| 6629277 | LSSD interface
| February 15, 2000 |
| 6625560 | Method of testing serial interface
| July 13, 2001 |
| 6618829 | Communication system, a synchronization circuit, a method of communicating a data signal, and methods of synchronizing with a data signal
| March 26, 2001 |
| 6604203 | Arrangement and method for self-synchronization data to a local clock
| September 10, 1999 |
| 6598191 | Verification of asynchronous boundary behavior
| November 23, 1999 |
| 6598150 | Asynchronously accessing the program counter values of a data processing system by applying an independent clock on the latching and scan-chain circuits
| October 3, 2001 |
| 6594609 | Scan vector support for event based test system
| November 25, 2000 |
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