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Your search returned 1425 patents. ( 714/724 in Current US Classification ) |
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| Patent ID | Title | Date Filed |
| 7203882 | Clustering-based approach for coverage-directed test generation
| August 31, 2004 |
| 7203875 | Test systems and methods with compensation techniques
| May 7, 2004 |
| 7203460 | Automated test of receiver sensitivity and receiver jitter tolerance of an integrated circuit
| October 10, 2003 |
| 7197693 | Connection verification apparatus for verifying interconnection between multiple logic blocks
| January 28, 2003 |
| 7197684 | Single-ended transmission for direct access test mode within a differential input and output circuit
| May 5, 2004 |
| 7197680 | Communication interface for diagnostic circuits of an integrated circuit
| April 17, 2003 |
| 7197674 | Method and apparatus for conditioning of a digital pulse
| October 10, 2003 |
| 7194668 | Event based test method for debugging timing related failures in integrated circuits
| April 11, 2003 |
| 7191372 | Integrated data download
| August 27, 2004 |
| 7191265 | JTAG and boundary scan automatic chain selection
| April 29, 2003 |
| 7190822 | Method for customizing an integrated circuit element
| June 26, 2001 |
| 7185257 | Data transmitting/receiving method in HARQ data communication system
| October 22, 2001 |
| 7185248 | Failure analysis system and failure analysis method of logic LSI
| July 18, 2003 |
| 7185247 | Pseudo bus agent to support functional testing
| June 26, 2003 |
| 7181662 | On-chip test apparatus
| February 26, 2004 |
| 7181661 | Method and system for broadcasting data to multiple tap controllers
| February 4, 2004 |
| 7181660 | Reconstruction of non-deterministic algorithmic tester stimulus used as input to a device under test
| July 26, 2002 |
| 7181650 | Fault tolerant data storage circuit
| June 2, 2003 |
| 7181359 | Method and system of generic implementation of sharing test pins with I/O cells
| November 12, 2004 |
| 7178078 | Testing apparatus and testing method for an integrated circuit, and integrated circuit
| December 4, 2001 |
| 7178074 | Method for testing functional circuit block
| December 2, 2002 |
| 7178018 | Network interface sharing methods and apparatuses that support kernel mode data traffic and user mode data traffic
| October 28, 2005 |
| 7178017 | Network interface sharing methods and apparatuses that support kernel mode data traffic and user mode data traffic
| October 28, 2005 |
| 7177777 | Synchronization of multiple test instruments
| December 1, 2004 |
| 7174491 | Digital system and method for testing analogue and mixed-signal circuits or systems
| June 17, 2003 |
| 7174490 | Test system rider utilized for automated at-speed testing of high serial pin count multiple gigabit per second devices
| July 30, 2002 |
| 7174450 | Network interface sharing methods and apparatuses that support kernel mode data traffic and user mode data traffic
| October 28, 2005 |
| 7174448 | Network interface sharing methods and apparatuses that support kernel mode data traffic and user mode data traffic
| October 28, 2005 |
| 7171601 | Programmable jitter generator
| August 21, 2003 |
| 7171598 | Tester system having a multi-purpose memory
| May 8, 2003 |
| 7171497 | Progressive extended compression mask for dynamic trace
| November 22, 2002 |
| 7168020 | Circuit and method for testing embedded phase-locked loop circuit
| January 28, 2003 |
| 7168019 | Method and module for universal test of communication ports
| March 4, 1999 |
| 7168017 | Memory devices with selectively enabled output circuits for test mode and method of testing the same
| August 26, 2003 |
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