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Your search returned 123 patents.
( 714/53 in Current US Classification ) |
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| Patent ID | Title | Date Filed |
| 5513318 | Method for built-in self-testing of ring-address FIFOs
| December 28, 1994 |
| 5511164 | Method and apparatus for determining the source and nature of an error within a computer system
| March 1, 1995 |
| 5509119 | Fast comparison method and apparatus for error corrected cache tags
| September 23, 1994 |
| 5495579 | Central processor with duplicate basic processing units employing multiplexed cache store control signals to reduce inter-unit conductor count
| March 25, 1994 |
| 5454100 | Electronic apparatus
| March 2, 1995 |
| 5444722 | Memory module with address error detection
| February 17, 1993 |
| 5357615 | Addressing control signal configuration in a computer system
| December 19, 1991 |
| 5345582 | Failure detection for instruction processor associative cache memories
| December 20, 1991 |
| 5333292 | Microcomputer for selectively accessing non-volatile memory and other storage unit in response to allocated address inputs
| April 10, 1991 |
| 5313627 | Parity error detection and recovery
| January 2, 1992 |
| 5287483 | Prefetched operand storing system for an information processor
| July 14, 1992 |
| 5249188 | Synchronizing two processors as an integral part of fault detection
| August 26, 1991 |
| 5241547 | Enhanced error detection scheme for instruction address sequencing of control store structure
| October 20, 1989 |
| 5231640 | Fault tolerant processor/memory architecture
| July 20, 1990 |
| 5057999 | Microprocessor having a protection circuit to insure proper instruction fetching
| June 26, 1989 |
| 5054026 | Microprocessor having functional redundancy monitoring mode of operation
| August 14, 1989 |
| 4903194 | Storage addressing error detection circuitry
| November 12, 1987 |
| 4896257 | Computer system having virtual memory configuration with second computer for virtual addressing with translation error processing
| November 23, 1988 |
| 4882705 | Data transmission system including the downloading of a first program for the interruption of a second program
| August 2, 1988 |
| 4866662 | Memory connected state detecting circuit
| September 30, 1986 |
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