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| Patent ID | Title | Date Filed |
| 7159128 | Method and apparatus for selectively reducing the depth of digital data
| April 16, 2003 |
| 7159082 | System and method for throttling memory accesses
| October 3, 2005 |
| 7155631 | Information processing unit with a clock control circuit having access to the system bus during system clock changes
| February 19, 2003 |
| 7155630 | Method and unit for selectively enabling an input buffer based on an indication of a clock transition
| June 25, 2002 |
| 7155627 | Memory system and data transmission method
| August 22, 2003 |
| 7155626 | Data processor including clock thinning-out circuit
| January 24, 2003 |
| 7149916 | Method for time-domain synchronization across a bit-sliced data path design
| January 22, 2004 |
| 7149913 | Bus clock frequency management based on characteristics of an application program
| August 22, 2003 |
| 7146520 | Method and apparatus for controlling clocks in a processor with mirrored units
| May 12, 2003 |
| 7146519 | Bus clock frequency management based on device bandwidth characteristics
| August 22, 2003 |
| 7146513 | System for adjusting a clock frequency based on comparing a required process times and a worst case execution times and adjusting a voltage and clock frequency based on a number of ready state application tasks
| February 6, 2004 |
| 7146504 | Secure clock on computing device such as may be required in connection with a trust-based system
| June 13, 2002 |
| 7143304 | Method and apparatus for enhancing the speed of a synchronous bus
| May 30, 2003 |
| 7143303 | Memory device for compensating for a clock skew causing a centering error and a method for compensating for the clock skew
| March 19, 2004 |
| 7139941 | Method for correcting data using temporally preceding data
| January 16, 2003 |
| 7137025 | Key controlling system, key controlling apparatus, information encrypting apparatus, information decrypting apparatus and storage media for storing programs
| February 28, 2002 |
| 7137013 | Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control
| January 7, 2002 |
| 7134144 | Detecting and responding to a clock rollback in a digital rights management system on a computing device
| March 1, 2001 |
| 7134038 | Communication clocking conversion techniques
| May 27, 2005 |
| 7134036 | Processor core clock generation circuits
| December 12, 2003 |
| 7133944 | Media access controller with power-save mode
| January 14, 2004 |
| 7127631 | Single wire serial interface utilizing count of encoded clock pulses with reset
| May 13, 2002 |
| 7124314 | Method and apparatus for fine tuning clock signals of an integrated circuit
| October 9, 2003 |
| 7120818 | Method and device for data transfer
| March 22, 2002 |
| 7120813 | Method and apparatus for clock synthesis using universal serial bus downstream received signals
| January 28, 2003 |
| 7117384 | Timing method and apparatus for digital logic circuits
| April 29, 2003 |
| 7117382 | Variably controlled delay line for read data capture timing window
| May 30, 2002 |
| 7117381 | Control signal generation circuit and data transmission circuit having the same
| January 5, 2004 |
| 7116746 | Synchronous clock phase control circuit
| September 6, 2002 |
| 7116601 | Pseudo-synchronization of the transportation of data across asynchronous clock domains
| December 28, 2004 |
| 7114093 | Generic architecture and system for a programmable serial port having a shift register and state machine therein
| August 29, 2002 |
| 7111187 | Information processor and information processing system utilizing interface for synchronizing clock signal
| November 6, 2003 |
| 7111184 | System and method for deterministic communication across clock domains
| September 6, 2002 |
| 7107479 | Apparatus and method for bidirectional transfer of data by a base station
| December 2, 2004 |
| 7107478 | Data processing system having a Cartesian Controller
| December 4, 2003 |
| 7107477 | Programmable logic devices with skewed clocking signals
| January 31, 2003 |
| 7107474 | Data transfer unit and method
| September 11, 2003 |
| 7107473 | Method and device for synchronizing the global time of a plurality of TTCAN buses and a corresponding bus system
| March 14, 2002 |
| 7103792 | Information processing system has clock lines which are electrically isolated from another clock line electrically connected to clock buffer and termination voltage
| December 16, 2002 |
| 7100068 | Panel device for adjusting computer's operating frequency and showing system information
| February 24, 2003 |
| 7100067 | Data transmission error reduction via automatic data sampling timing adjustment
| March 19, 2003 |
| 7100066 | Clock distribution device and method in compact PCI based multi-processing system
| December 27, 2002 |
| 7100012 | Processor and data cache with data storage unit and tag hit/miss logic operated at a first and second clock frequencies
| July 28, 2003 |
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