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Your search returned 260 patents. ( 712/22 in Current US Classification ) |
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| Patent ID | Title | Date Filed |
| 6763450 | Processor
| October 6, 2000 |
| 6760831 | Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
| April 1, 2002 |
| 6754802 | Single instruction multiple data massively parallel processor systems on a chip and system using same
| August 25, 2000 |
| 6754801 | Method and apparatus for a shift register based interconnection for a massively parallel processor array
| August 22, 2000 |
| 6748514 | Parallel processor and image processing system for simultaneous processing of plural image data items without additional circuit delays and power increases
| February 14, 2001 |
| 6741294 | Digital signal processor and digital signal processing method
| August 6, 1999 |
| 6738837 | Digital system with split transaction memory access
| February 1, 2002 |
| 6738522 | Efficient SIMD quantization method
| February 1, 2001 |
| 6732253 | Loop handling for single instruction multiple datapath processor architectures
| November 13, 2000 |
| 6728863 | Wide connections for transferring data between PE's of an N-dimensional mesh-connected SIMD array while transferring operands from memory
| October 25, 2000 |
| 6715061 | Multimedia-instruction acceleration device for increasing efficiency and method for the same
| July 12, 2000 |
| 6681296 | Method and apparatus for software management of on-chip cache
| August 1, 2001 |
| 6675292 | Exception handling for SIMD floating point-instructions using a floating point status register to report exceptions
| August 13, 1999 |
| 6665790 | Vector register file with arbitrary vector addressing
| February 29, 2000 |
| 6658655 | Method of executing an interpreter program
| December 6, 1999 |
| 6647486 | Information processing apparatus for entertainment system utilizing DMA-controlled high-speed transfer and processing of routine data
| May 22, 2002 |
| 6647408 | Task distribution
| July 16, 1999 |
| 6625722 | Processor controller for accelerating instruction issuing rate
| November 16, 1999 |
| 6622234 | Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructions
| June 21, 2000 |
| 6609235 | Method for providing a fill pattern for an integrated circuit design
| June 22, 2001 |
| 6601157 | Register addressing
| November 1, 2000 |
| 6571328 | Method and apparatus for obtaining a scalar value directly from a vector register
| August 1, 2001 |
| 6530012 | Setting condition values in a computer
| September 13, 1999 |
| 6523106 | Method and apparatus for efficient pipelining
| December 21, 1998 |
| 6516406 | Processor executing unpack instruction to interleave data elements from two packed data
| September 8, 2000 |
| 6516403 | System for synchronizing use of critical sections by multiple processors using the corresponding flag bits in the communication registers and access control register
| April 28, 1999 |
| 6493817 | Floating-point unit which utilizes standard MAC units for performing SIMD operations
| May 21, 1999 |
| 6484255 | Selective writing of data elements from packed data based upon a mask using predication
| September 20, 1999 |
| 6438676 | Distance controlled concatenation of selected portions of elements of packed data
| August 4, 1999 |
| 6427201 | Information processing apparatus for entertainment system utilizing DMA-controlled high-speed transfer and processing of routine data
| August 18, 1998 |
| 6417857 | System architecture and method for operating a medical diagnostic ultrasound system
| June 21, 2001 |
| 6404439 | SIMD control parallel processor with simplified configuration
| March 4, 1998 |
| 6385713 | Microprocessor with parallel inverse square root logic for performing graphics function on packed data elements
| January 4, 2001 |
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