REGISTER  |  SIGN IN
   
Your search returned 381 patents.
( 710/53 in Current US Classification )
1 2 3 4
Patent IDTitleDate Filed
6967930 Method and apparatus for transmitting data packets July 24, 2001
6961835 System and method for autonomically reallocating memory among buffer pools March 19, 2003
6957293 Split completion performance of PCI-X bridges based on data transfer amount April 15, 2002
6948030 FIFO memory system and method September 4, 2002
6944728 Interleaving memory access December 23, 2002
6941426 System for head and tail caching December 31, 2001
6941393 Pushback FIFO March 5, 2002
6938102 Dequeuing from a host adapter two-dimensional queue August 20, 2004
6931460 Dynamically self-adjusting polling mechanism May 19, 2003
6925508 Recording method from improving interrupted interference by checking size of main buffer and allocating alternative buffer to generating interpolated sample if main buffer is to small June 28, 2002
6922758 Synchronous flash memory with concurrent write and read operation February 25, 2004
6920526 Dual-bank FIFO for synchronization of read data in DDR SDRAM July 20, 2000
6920522 Synchronous flash memory with accessible page during write March 11, 2004
6915175 Method and device for programming nonvolatile semiconductor memory October 11, 2001
6912598 Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read July 28, 2000
6910084 Method and system for transferring and storing data in a medical device with limited storage and memory April 30, 2001
6907479 Integrated circuit FIFO memory devices that are divisible into independent FIFO queues, and systems and methods for controlling same August 30, 2001
6901500 Method and apparatus for prefetching information and storing the information in a stream buffer July 28, 2000
6901465 Data transfer control device, electronic equipment, and data transfer control method April 29, 2002
6900906 Apparatus, method and computer readable recording medium for processing image information September 25, 2000
6883045 Apparatus for reordering graphics responses in a peripheral interface circuit for an I/O node of a computer system March 7, 2002
6883044 Synchronous flash memory with simultaneous access to one or more banks July 28, 2000
6882656 Speculative transmit for system area network latency reduction April 13, 2004
6882568 Memory system with improved efficiency of data transfer between host, buffer and nonvolatile memory April 2, 2003
6877049 Integrated FIFO memory management control system using a credit value May 30, 2002
6874043 Data buffer April 22, 2002
6871257 Pipelined parallel programming operation in a non-volatile memory system February 22, 2002
6865654 Device for interfacing asynchronous data using first-in-first-out July 30, 2002
6865628 Output data path capable of multiple data rates February 3, 2003
6865627 Regulating real-time data capture rates to match processor-bound data consumption rates December 27, 2002
6865626 UART automatic half-duplex direction control with programmable delay March 17, 2000
6862631 Hardware I/O control block array for mirrored data transfers February 12, 2004
6857031 DMA transfer method March 6, 2003
6851026 Synchronous flash memory with concurrent write and read operation July 28, 2000
6850092 Low latency FIFO circuits for mixed asynchronous and synchronous systems June 8, 2001
6848033 Method of memory management in a multi-threaded environment and program storage device June 7, 2001
6845414 Apparatus and method of asynchronous FIFO control March 15, 2002
1 2 3 4
Page 1 of 4