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Your search returned 255 patents.
( 710/317 in Current US Classification ) |
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| 1 2 3 |
| Patent ID | Title | Date Filed |
| 6915362 | System to aggregate keyboard video mouse (KVM) control across multiple server blade chassis
| April 25, 2003 |
| 6912612 | Shared bypass bus structure
| February 5, 2003 |
| 6904465 | Low latency inter-reference ordering in a multiple processor system employing a multiple-level inter-node switch
| April 26, 2001 |
| 6898658 | Method to prevent net update oscillation
| December 27, 2001 |
| 6880046 | Multiprocessor system and memory access method
| August 25, 2000 |
| 6874053 | Shared memory multiprocessor performing cache coherence control and node controller therefor
| September 5, 2003 |
| 6871253 | Data transmission circuit for memory subsystem, has switching circuit that selectively connects or disconnects two data bus segments to respectively enable data transmission or I/O circuit connection
| June 29, 2001 |
| 6868438 | Storage system, disk control cluster and a method of increasing of disk control cluster
| February 7, 2002 |
| 6865639 | Scalable self-routing superconductor switch
| December 19, 2001 |
| 6854036 | Method of transferring data in a processing system
| September 24, 2001 |
| 6853316 | Industrial switching hub for Ethernet network
| August 20, 2001 |
| 6851029 | Disk storage system including a switch
| April 3, 2003 |
| 6848017 | Method and apparatus for determining connections in a crossbar switch
| October 24, 2001 |
| 6842104 | SYSTEM LSI AND A CROSS-BUS SWITCH APPARATUS ACHIEVED IN A PLURALITY OF CIRCUITS IN WHICH TWO OR MORE PAIRS OF A SOURCE APPARATUS AND A DESTINATION APPARATUS ARE CONNECTED SIMULTANEOUSLY AND BUSES ARE WIRED WITHOUT CONCENTRATION
| March 15, 2000 |
| 6839795 | Priority cross-bar decoder
| May 31, 2000 |
| 6836815 | Layered crossbar for interconnection of multiple processors and shared memories
| August 8, 2001 |
| 6826647 | Voice operated communications interface
| May 2, 2001 |
| 6820167 | Configurable crossbar and related methods
| May 16, 2002 |
| 6813689 | Communications architecture for a high throughput storage processor employing extensive I/O parallelization
| March 29, 2002 |
| 6801978 | Crossbar system with increased throughput
| May 21, 2003 |
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