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Your search returned 211 patents.
( 710/26 in Current US Classification ) |
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| Patent ID | Title | Date Filed |
| 6370595 | Method of addressing a plurality of addressable units by a single address word
| March 29, 1999 |
| 6349346 | Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit
| September 23, 1999 |
| 6347347 | Multicast direct memory access storing selected ones of data segments into a first-in-first-out buffer and a memory simultaneously when enabled by a processor
| December 17, 1999 |
| 6345241 | Method and apparatus for simulation of data in a virtual environment using a queued direct input-output device
| February 19, 1999 |
| 6324599 | Computer system and method for tracking DMA transferred data within a read-ahead local buffer without interrupting the host processor
| January 11, 1999 |
| 6317799 | Destination controlled remote DMA engine
| April 28, 2000 |
| 6311235 | UART support for address bit on seven bit frames
| October 31, 1998 |
| 6298399 | System for managing input/output accesses at a bridge/memory controller having a status register for recording cause of interrupt
| January 31, 2000 |
| 6292853 | DMA controller adapted for transferring data in two-dimensional mapped address space
| October 1, 1998 |
| 6260101 | Microcontroller having dedicated hardware for memory address space expansion supporting both static and dynamic memory devices
| March 7, 1997 |
| 6256683 | Methods and apparatus for providing direct memory access control
| December 23, 1999 |
| 6226338 | Multiple channel data communication buffer with single transmit and receive memories
| June 18, 1998 |
| 6223230 | Direct memory access in a bridge for a multi-processor system
| June 15, 1998 |
| 6219725 | Method and apparatus for performing direct memory access transfers involving non-sequentially-addressable memory locations
| August 28, 1998 |
| 6202106 | Method for providing specific knowledge of a structure of parameter blocks to an intelligent direct memory access controller
| September 9, 1998 |
| 6185634 | Address triggered DMA controller with an indicative signal including circuitry for calculating a new trigger address value based on the sum of the current trigger address and the descriptor register data with a trigger address register
| September 27, 1996 |
| 6185607 | Method for managing network data transfers with minimal host processor involvement
| May 26, 1998 |
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