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| Patent ID | Title | Date Filed |
| 7197097 | Apparatus and method for re-synchronization of transmitted serial signal of data frame and idle pattern
| October 1, 2003 |
| 7197053 | Serializer with programmable delay elements
| March 5, 2003 |
| 7194058 | Apparatus and method for generating transmission and reception local oscillation signals in a mobile terminal
| September 28, 2001 |
| 7194057 | System and method of oversampling high speed clock/data recovery
| December 21, 2005 |
| 7194046 | Frequency error correction unit and method in a wireless LAN system
| June 27, 2002 |
| 7190755 | Phase-locked loop circuitry for programmable logic devices
| October 4, 2002 |
| 7190754 | Transceiver with selectable data rate
| December 24, 2001 |
| 7187743 | Frequency error correction in a communication system
| December 20, 2002 |
| 7187742 | Synchronized multi-output digital clock manager
| October 6, 2000 |
| 7184732 | PLL frequency synthesizer
| December 27, 2001 |
| 7184512 | Phase locked loop circuit and optical communications receiving apparatus
| January 28, 2003 |
| 7184510 | Differential charge pump
| September 26, 2003 |
| 7184509 | Delay locked loop circuit for internally correcting duty cycle and duty cycle correction method thereof
| July 14, 2003 |
| 7183864 | Ring oscillator for use in parallel sampling of high speed data
| November 25, 2002 |
| 7183863 | Self-initializing frequency detector
| October 20, 1998 |
| 7183860 | Gain calibration of a digital controlled oscillator
| June 10, 2005 |
| 7181180 | Sigma delta modulated phase lock loop with phase interpolation
| December 15, 2003 |
| 7181174 | Wireless transmit-only apparatus and method
| August 21, 2003 |
| 7177611 | Hybrid control of phase locked loops
| July 7, 2004 |
| 7177382 | Fully integrated broadband tuner
| February 25, 2004 |
| 7177381 | Noise-resistive, burst-mode receiving apparatus and a method for recovering a clock signal and data therefrom
| June 26, 2002 |
| 7177288 | Simultaneous transmission and reception of signals in different frequency bands over a bus line
| November 28, 2001 |
| 7173995 | Systems and methods for correcting gain error due to transition density variation in clock recovery systems
| December 23, 2002 |
| 7173994 | Timing recovery circuit with multiple stages
| February 21, 2006 |
| 7173993 | Method for sampling phase control
| August 16, 2002 |
| 7171182 | Frequency synthesizers for supporting voice communication and wireless networking standards
| May 1, 2002 |
| 7170965 | Low noise divider module for use in a phase locked loop and other applications
| April 3, 2003 |
| 7170964 | Transition insensitive timing recovery method and apparatus
| January 31, 2003 |
| 7164735 | Phase-locked loop for synchronization with a subcarrier contained in an intelligence signal
| March 11, 2002 |
| 7164734 | Decision directed phase locked loops (DD-PLL) with excess processing power in digital communication systems
| December 4, 2001 |
| 7162732 | System and related methods facilitating the detection and acquisition of a data channel in a cable modem
| March 27, 2001 |
| 7162002 | Phase-interpolator based PLL frequency synthesizer
| October 31, 2002 |
| 7161998 | Digital phase locked loop for regenerating the clock of an embedded signal
| July 26, 2001 |
| 7161970 | Spread spectrum clock generator
| September 10, 2004 |
| 7161436 | Charge pump structure for reducing capacitance in loop filter of a phase locked loop
| November 27, 2002 |
| 7158603 | Method and apparatus for compensating deviation variances in a 2-level FSK FM transmitter
| December 26, 2002 |
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