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| Patent ID | Title | Date Filed |
| 7123496 | L0 cache alignment circuit
| May 10, 2004 |
| 7111149 | Method and apparatus for generating a device ID for stacked devices
| July 7, 2003 |
| 7109750 | Reconfiguration port for dynamic reconfiguration-controller
| April 30, 2004 |
| 7109746 | Data monitoring for single event upset in a programmable logic device
| March 22, 2004 |
| 7106648 | X-address extractor and memory for high speed operation
| June 28, 2004 |
| 7102957 | Reduction of fusible links and associated circuitry on memory dies
| January 30, 2006 |
| 7102956 | Reduction of fusible links and associated circuitry on memory dies
| January 30, 2006 |
| 7102955 | Reduction of fusible links and associated circuitry on memory dies
| January 30, 2006 |
| 7095247 | Configuring FPGAs and the like using one or more serial memory devices
| March 25, 2004 |
| 7088638 | Global and local read control synchronization method and system for a memory array configured with multiple memory subarrays
| February 9, 2005 |
| 7076623 | Information update count managing method, information update count managing apparatus, contents usage count managing method, and content usage count storing apparatus
| October 12, 2000 |
| 7073039 | Providing a register file memory with local addressing in a SIMD parallel processor
| September 2, 2004 |
| 7073014 | Synchronous non-volatile memory system
| July 28, 2000 |
| 7061821 | Address wrap function for addressable memory devices
| February 6, 2002 |
| 7057968 | Semiconductor integrated circuit device
| March 10, 2005 |
| 7057966 | Semiconductor memory device for reducing current consumption in operation
| November 30, 2004 |
| 7057962 | Address control for efficient memory partition
| March 22, 2004 |
| 7047391 | System and method for re-ordering memory references for access to memory
| December 21, 2004 |
| 7046574 | Memory system
| July 30, 2002 |
| 7046560 | Reduction of fusible links and associated circuitry on memory dies
| September 2, 2004 |
| 7043598 | Method and apparatus for dynamic memory refreshing
| December 31, 2001 |
| 7042793 | Semiconductor memory device
| June 3, 2005 |
| 7042790 | Semiconductor device, sales method for semiconductor device, sales system for semiconductor device and program product storing sales program for semiconductor device
| September 28, 2001 |
| 7038952 | Block RAM with embedded FIFO buffer
| May 4, 2004 |
| 7038937 | Dynamic memory word line driver scheme
| March 2, 2004 |
| 7027350 | Device and method for partial read-protection of a non-volatile storage
| March 22, 2002 |
| 7027347 | Semiconductor memory device
| January 2, 2004 |
| 7024498 | Apparatus for receiving data packet eliminating the need of a temporary memory and memory controller and method thereof
| June 13, 2003 |
| 7017004 | System and method for updating contents of a flash ROM
| March 29, 2002 |
| 7016253 | Fixed-address digital data access system
| November 5, 2003 |
| 7012849 | Semiconductor, image output device, and driving method of a functional device
| July 16, 2003 |
| 7009906 | Semiconductor memory device having easily redesigned memory capacity
| November 26, 2003 |
| 7002871 | Asynchronous pseudo SRAM and access method therefor
| January 23, 2004 |
| 7002851 | Storage device employing a flash memory
| March 22, 2005 |
| 6999376 | Burst read addressing in a non-volatile memory device
| April 22, 2004 |
| 6996025 | Integrated circuit memory devices having zig-zag arrangements of column select IO blocks to increase input/output line routing efficiency
| February 9, 2004 |
| 6990041 | Selectable clock input
| December 30, 2003 |
| 6988163 | Executing binary images from non-linear storage systems
| October 21, 2002 |
| 6985399 | Main word line driver circuit receiving negative voltage in semiconductor memory device
| December 30, 2003 |
| 6980478 | Zero-enabled fuse-set
| September 1, 2004 |
| 6977862 | Address decoding circuit and method for addressing a regular memory area and a redundant memory area in a memory circuit
| August 18, 2004 |
| 6975559 | Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface
| May 30, 2003 |
| 6973005 | Flash array implementation with local and global bit lines
| February 23, 2004 |
| 6961280 | Techniques for implementing address recycling in memory circuits
| December 8, 2003 |
| 6956785 | Method and apparatus for saving current in a memory device
| August 9, 2004 |
| 6954400 | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
| August 3, 2004 |
| 6952377 | Memory device and method for writing data in memory cell with boosted bitline voltage
| April 15, 2004 |
| 6947341 | Integrated semiconductor memory chip with presence detect data capability
| December 9, 2004 |
| 6947302 | Multi-match detection circuit for use with content-addressable memories
| January 6, 2004 |
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