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| Patent ID | Title | Date Filed |
| 7187202 | Circuit for reducing programmable logic pin counts for large scale logic
| September 30, 2004 |
| 7187200 | Columnar architecture
| October 10, 2003 |
| 7183796 | Configuration memory implementation for LUT-based reconfigurable logic architectures
| March 17, 2003 |
| 7178113 | Identification of an integrated circuit from its physical manufacture parameters
| April 4, 2002 |
| 7176718 | Organizations of logic modules in programmable logic devices
| January 21, 2005 |
| 7176717 | Programmable logic and routing blocks with dedicated lines
| January 14, 2005 |
| 7176713 | Integrated circuits with RAM and ROM fabrication options
| January 5, 2004 |
| 7167025 | Non-sequentially configurable IC
| June 30, 2004 |
| 7167023 | Multiple data rate interface architecture
| February 15, 2005 |
| 7167022 | Omnibus logic element including look up table based logic elements
| March 25, 2004 |
| 7164294 | Method for forming programmable logic arrays using vertical gate transistors
| August 30, 2004 |
| 7164288 | Electronic circuit with array of programmable logic cells
| February 12, 2004 |
| 7161384 | Flexible macrocell interconnect
| July 12, 2005 |
| 7161382 | General-purpose logic cell, general-purpose logic cell array using the same, and ASIC using general-purpose logic cell array
| May 15, 2003 |
| 7161381 | Multiple size memories in a programmable logic device
| February 25, 2004 |
| 7161380 | Apparatus and method adapted to use one-time programming devices for multiple-time programming
| May 11, 2005 |
| 7157937 | Structured integrated circuit device
| July 22, 2005 |
| 7145362 | Clock signal-distribution network for an integrated circuit
| November 5, 2004 |
| 7145361 | Configurable integrated circuit with different connection schemes
| June 30, 2004 |
| 7145360 | Configurable logic element with expander structures
| November 16, 2004 |
| 7142012 | Architecture and interconnect scheme for programmable logic circuits
| May 10, 2006 |
| 7142008 | Method and apparatus for clock division on a programmable logic device
| December 9, 2003 |
| 7135890 | SCL type FPGA with multi-threshold transistors and method for forming same
| April 19, 2004 |
| 7135888 | Programmable routing structures providing shorter timing delays for input/output signals
| July 22, 2004 |
| 7132853 | Inter-tile buffer system for a field programmable gate array
| April 24, 2006 |
| 7132852 | Routing architecture with high speed I/O bypass path
| April 14, 2004 |
| 7132851 | Columnar floorplan
| July 11, 2003 |
| 7132850 | Semiconductor integrated circuit and circuit design apparatus
| October 22, 2003 |
| 7129747 | CPLD with fast logic sharing between function blocks
| October 15, 2004 |
| 7119574 | Passage structures for use in low-voltage applications
| August 8, 2003 |
| 7119573 | Field-programmable gate array low voltage differential signaling driver utilizing two complimentary output buffers
| May 5, 2005 |
| 7116130 | Method and apparatus for effectively re-downloading data to a field programmable gate array
| December 18, 2003 |
| 7112994 | Three dimensional integrated circuits
| May 17, 2004 |
| 7111272 | Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA
| April 27, 2004 |
| 7109751 | Methods of implementing phase shift mask compliant static memory cell circuits
| June 2, 2004 |
| 7109745 | Configurable integrated circuit for use in a multi-function handheld device
| July 26, 2005 |
| 7106099 | Decision-feedback equalization clocking apparatus and method
| October 22, 2004 |
| 7102387 | Periodic computation structure based on 1-input lookup tables
| December 8, 2004 |
| 7102385 | Dedicated input/output first in/first out module for a field programmable gate array
| December 6, 2005 |
| 7098691 | Structured integrated circuit device
| July 27, 2004 |
| 7098688 | Regionally time multiplexed emulation system
| September 24, 2003 |
| 7098685 | Scalable serializer-deserializer architecture and programmable interface
| July 14, 2003 |
| 7095253 | Programmable multi-chip module
| July 21, 2003 |
| 7088135 | Nonvolatile switch, in particular for high-density nonvolatile programmable-logic devices
| January 20, 2004 |
| 7086025 | Programmable logic device partitioning method for application specific integrated circuit prototyping
| October 23, 2003 |
| 7080185 | Bus control device altering drive capability according to condition
| November 18, 2002 |
| 7078930 | Integrated circuit chip with high area utilization rate
| April 7, 2005 |
| 7075332 | Six-input look-up table and associated memory control circuitry for use in a field programmable gate array
| June 8, 2004 |
| 7071734 | Programmable logic devices with silicon-germanium circuitry and associated methods
| October 15, 2002 |
| 7071733 | Cross-bar matrix for connecting digital resources to I/O pins of an integrated circuit
| May 17, 2004 |
| 7068072 | Integrated circuit with interface tile for coupling to a stacked-die second integrated circuit
| June 30, 2003 |
| 7068071 | Integrated circuit with overclocked dedicated logic circuitry
| October 22, 2004 |
| 7064580 | Mask-programmable logic device with programmable portions
| July 22, 2004 |
| 7064579 | Alterable application specific integrated circuit (ASIC)
| June 22, 2004 |
| 7064574 | PLD memory cells utilizing metal-to-metal capacitors to selectively reduce susceptibility to single event upsets
| June 8, 2004 |
| 7061271 | Six-input look-up table for use in a field programmable gate array
| June 8, 2004 |
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